Correlation of Rutherford Backscattering and Electrical Measurements on Si Implanted InP Following Rapid Thermal and Furnace Annealing

1985 ◽  
Vol 45 ◽  
Author(s):  
G. Bahir ◽  
J.L. Merz ◽  
J.R. Abelson ◽  
T.W. Sigmon
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Structural Disorder ◽  
Electrical Activation ◽  
Electrical Measurements ◽  
Furnace Annealing ◽  
Damage Level ◽  
Ion Channeling ◽  
Structural And Electrical Properties ◽  
Substrate Temperatures

ABSTRACTWe report on the structural and electrical properties of (100) InP resulting from the implantation of 180 keV Si+ and subsequent annealing. The radiation damage produced by implantation at substrate temperatures from 77 to 480 K is evaluated using MeV He ion channeling. Varying degrees of recrystallization are found depending on the implant temperature and choice of furnace vs. rapid thermal annealing. Samples implanted at 25°C to a dose of 3.3.1014ions/cm2 continue to display structural disorder regardless of annealing procedures. In contrast, implantation at 200°C to 3.3-1014ions/cm2 produces a low but measurable damage level. Further annealing lowered the disorder to a level similar to that of unimplanted material.The electrical activation of both low and high fluence ion doses is nearly the same at the optimal conditions for rapid thermal annealing (RTA) or furnace annealing (FA). However the electron mobility is found to be higher after hot implantation and RTA. The electrical profile after hot implantation is wider than the profile after RT implants and FA.

Rapid Thermal Anneal and Furnace Anneal of Silicon and Beryimlum Implanted Gallium Arsenide

1985 ◽  
Vol 45 ◽  
Author(s):  
A.T. Yuen ◽  
S.I. Long ◽  
J.L. Merz
Keyword(s):  
Gallium Arsenide ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Electrical Activation ◽  
Donor Concentration ◽  
Rapid Thermal Anneal ◽  
Furnace Annealing ◽  
Hall Measurements ◽  
P Type

ABSTRACTA comparison has been made between rapid thermal annealing (RTA) and furnace annealing (FA) of implanted GaAs. Hall measurements showed consistently higher electrical activation of n-type (Si-5E12 cm −2) implants with FA and higher electrical activation of p-type (Be-1E14 cm −2) implants with RTA. Photoluminescence (PL) revealed that for RTA temperatures above 950°C some of the Si was going onto As, acceptor sites, thus reducing the net donor concentration. PL for RTA below 950°C showed signs of incomplete recrystallization. By a technique of “dual implantation” of As and Si into GaAs we were able to force the Si onto Ga-sites resulting in a higher donor concentration after RTA.

Rapid Thermal Annealing of Si-Implanted GaAs for Power FETs

1984 ◽  
Vol 35 ◽  
Author(s):  
H. Kanber ◽  
R. J. Cipolli ◽  
J. M. Whelan
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Damage Model ◽  
Low Noise ◽  
Electrical Activation ◽  
Controlled Atmosphere ◽  
Furnace Annealing

ABSTRACTOptimization and the advantages of rapid thermal annealing (RTA) for the electrical activation of deep 300 keV Si+ implants into GaAs are investigated and established for doses of 6 to 8×1012 cm−2. These implant conditions are appropriate for power FETs. Results are compared with those based on conventional controlled atmosphere capless furnace annealing (CAT).The RTA yielded higher peak electron concentrations, high mobilities and greater uniformities in the gateless FET saturation currents. The deep implant results ontrast with those for shallower implants for low noise FETs. These differences are explained using a well-known implant damage model.

Rapid Thermal Annealing of Ion Implanted GaAs and InP

1983 ◽  
Vol 23 ◽  
Author(s):  
K.V. Vaidyanathan ◽  
H.L. Dunlap
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
High Intensity ◽  
Annealing Process ◽  
Electrical Activation ◽  
High Fluence ◽  
Furnace Annealing ◽  
Conventional Furnace ◽  
Conventional Furnace Annealing ◽  
Ion Implanted

ABSTRACTThis paper discusses the properties of high intensity lamp-annealed silicon or beryllium-implanted GaAs and InP samples. We find this annealing process can result in efficient activation of dopants. Conventional furnace annealing at the same temperature does not result in increased electrical activation of the dopants. High fluence silicon implants can be activated in anneal times as short as 2 seconds, while low fluence silicon implants require more extended annealing. Activation of low fluence implants in GaAs depends strongly on the properties of the bulk semiinsulating material.

omparisons of Silicide Formation by Rapid Thermal Annealing and Conventional Furnace Annealing

1987 ◽  
Vol 92 ◽  
Author(s):  
E. Ma ◽  
M. Natan ◽  
B.S. Lim ◽  
M-A. Nicolet
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Silicide Formation ◽  
X Ray Diffraction ◽  
Furnace Annealing ◽  
Cross Sectional ◽  
Conventional Furnace ◽  
Diffusion Controlled ◽  
Conventional Furnace Annealing ◽  
Kinetics Of

ABSTRACTSilicide formation induced by rapid thermal annealing (RTA) and conventional furnace annealing (CFA) in bilayers of sequentially deposited films of amorphous silicon and polycrystalline Co or Ni is studied with RBS, X-ray diffraction and TEM. Particular attention is paid to the reliability of the RTA temperature measurements in the study of the growth kinetics of the first interfacial compound, Co2Si and Ni2Si, for both RTA and CFA. It is found that the same diffusion-controlled kinetics applies for the silicide formation by RTA in argon and CFA in vacuum with a common activation energy of 2.1+0.2eV for Co2Si and 1.3+0.2eV for Ni Si. Co and Ni atoms are the dominant diffusing species; during silicide formation by both RTA and CFA. The microstructures of the Ni-silicide formed by the two annealing techniques, however, differs considerably from each other, as revealed by cross-sectional TEM studies.

Correlation Between Defect Characteristics and Layer Intermixing in Si Implanted GaAs/AIGaAs Superlattices

1989 ◽  
Vol 147 ◽  
Author(s):  
Samuel Chen ◽  
S.-Tong Lee ◽  
G. Braunstein ◽  
G. Rajeswaran ◽  
P. Fellinger
Keyword(s):  
Ion Implantation ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Peak Position ◽  
Compound Semiconductor ◽  
Subsequent Annealing ◽  
Semiconductor Superlattices ◽  
Furnace Annealing ◽  
Annealing Conditions ◽  
Induced Defects

AbstractDefects induced by ion implantation and subsequent annealing are found to either promote or suppress layer intermixing in Ill-V compound semiconductor superlattices (SLs). We have studied this intriguing relationship by examining how implantation and annealing conditions affect defect creation and their relevance to intermixing. Layer intermixing has been induced in SLs implanted with 220 keV Si+ at doses < 1 × 1014 ions/cm2 and annealed at 850°C for 3 hrs or 1050°C for 10 s. Upon furnace annealing, significant Si in-diffusion is observed over the entire intermixed region, but with rapid thermal annealing layer intermixing is accompanied by negligible Si movement. TEM showed that the totally intermixed layers are centered around a buried band of secondary defects and below the Si peak position. In the nearsurface region layer intermixing is suppressed and is only partially completed at ≤1 × 1015 Si/cm2. This inhibition is correlated to a loss of the mobile implantation-induced defects, which are responsible for intermixing.

The effects of point defects on the electrical activation of Si-implanted GaAs during rapid thermal annealing

1992 ◽  
Vol 39 (1) ◽  
pp. 176-183 ◽  
Author(s):  
J.-L. Lee ◽  
L. Wei ◽  
S. Tanigawa ◽  
T. Nakagawa ◽  
K. Ohta ◽  
...  
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Point Defects ◽  
Electrical Activation

Rapid Thermal Annealing of Neutron Transmutation Toped Czochralski Silicon

1992 ◽  
Vol 262 ◽  
Author(s):  
G. M. Berezina ◽  
F. P. Kdrshunov ◽  
N. A. Sobolev ◽  
A. V. Voevodova ◽  
A. A. Stuk
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Neutron Irradiation ◽  
Irradiation Temperature ◽  
Electrical Parameters ◽  
Furnace Annealing ◽  
Annealing Behaviour ◽  
Czochralski Silicon ◽  
Neutron Transmutation

ABSTRACTThe influence of the rapid thermal annealing (RTA) in comparison with that of the standard furnace annealing (FA) on the electrical parameters and photoluminescence (PL) of Czochralski silicon (Cz Si) subjected to neutron irradiation at various temperatures has been studied. The role of the irradiation temperature on the annealing behaviour of electrical parameters in Cz Si has been established. The possibility of getting neutron transmutation doped (NTD) Cz Si having the calculated resistivity by means of the RTA is shown.

Comparison Between Rapid Thermal and Furnace Annealing for A-Si Solid Phase Crystallization

1996 ◽  
Vol 424 ◽  
Author(s):  
Reece Kingi ◽  
Yaozu Wang ◽  
Stephen J. Fonash ◽  
Osama Awadelkarim ◽  
John Mehlhaff
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Annealing Temperature ◽  
Solid Phase ◽  
Growth Time ◽  
Crystallization Time ◽  
Solid Phase Crystallization ◽  
Furnace Annealing ◽  
Lower Growth ◽  
Transient Time

AbstractRapid thermal annealing and furnace annealing for the solid phase crystallization of amorphous silicon thin films deposited using PECVD from argon diluted silane have been compared. Results reveal that the crystallization time, the growth time, and the transient time are temperature activated, and that the resulting polycrystalline silicon grain size is inversely proportional to the annealing temperature, for both furnace annealing and rapid thermal annealing. In addition, rapid thermal annealing was found to result in a lower transient time, a lower growth time, a lower crystallization time, and smaller grain sizes than furnace annealing, for a given annealing temperature. Interestingly, the transient time, growth time, and crystallization time activation energies are much lower for rapid thermal annealing, compared to furnace annealing.We propose two models to explain the observed differences between rapid thermal annealing and furnace annealing.

Sign in / Sign up

Export Citation Format

Share Document