Defect Generation During Epitaxial Growth of CoSi2 on Miniature Sized (100) Si Substrate and its Effect on Electrical Properties

1995 ◽  
Vol 402 ◽  
Author(s):  
Jeong Soo Byun ◽  
Jeong Min Seon ◽  
Jin Won Park ◽  
Hyunsang Hwang ◽  
Jae Jeong Kim-

AbstractSelf-aligned silicide (salicide) formation of epitaxial CoSi2, using a Co/Ti bilayer, on linear oxide (SiO2) patterned (100)Si substrate has been investigated. Rapid thermal annealing (RTA) at 550°C resulted in the lateral encroachment of silicide in the Si under the edge of the oxide. After RTA at 900°C, even though an epitaxial CoSi2 layer was formed on the Si substrate, defects such as lateral encroachment and voids were generated under the edge of the oxide. It was found that such defects lead to device failure due to the deterioration of the gate oxide and the shallow junction.

1999 ◽  
Vol 564 ◽  
Author(s):  
Hwa Sung Rhee ◽  
Dong Kyun Sohn ◽  
Byung Tae Ahn

AbstractA uniform epitaxial CoSi2 layer was grown on (100) Si substrate by rapid thermal annealing at 800°C in N2 ambient without capping layers from an amorphous cobalt-carbon film. The amorphous cobalt-carbon film was deposited on Si substrate by the pyrolysis of cyclopentadienyl dicarbonyl cobalt. Co(η5-C5H5)(CO)2. at 350°C. The leakage current measured on the junction, fabricated with the epitaxial CoSi2 layer and annealed at 1000°C for 30 s. was as low as that of the as-fabricated junction without silicide. indicating that epitaxial (100) CoSi2 is thermally stable at temperatures even above 1000°C and has a potential applicability to the salicide process in sub-half micron devices.


2001 ◽  
Vol 40 (Part 1, No. 7) ◽  
pp. 4450-4453
Author(s):  
Je Won Kim ◽  
Seong-Il Kim ◽  
Yong Tae Kim ◽  
Sangsig Kim ◽  
Man Young Sung ◽  
...  

2010 ◽  
Vol 7 (2) ◽  
pp. 284-287 ◽  
Author(s):  
Paweł Piotr Michałowski ◽  
Volkhard Beyer ◽  
Malte Czernohorsky ◽  
Peter Kücher ◽  
Steffen Teichert ◽  
...  

1993 ◽  
Vol 303 ◽  
Author(s):  
Bojun Zhang ◽  
Dennis M. Maher ◽  
Mark S. Denker ◽  
Mark A. Ray

ABSTRACTWe report a systematic study of dopant diffusion behavior for thin gate oxides and polysilicon implanted gate structures. Boron behavior is emphasized and its behavior is compared to that of As+ and BF2+. Dopant activation is achieved by rapid thermal annealing. Test structures with 100 Å, 60 Å and 30 Å gate oxides and ion implanted polysilicon gate electrodes were fabricated and characterized after annealing by SIMS, SEM, TEM, and C-V rpeasurements. For arsenic implanted structures, no dopant diffusion through a gate oxide of 30 Å thickness and an annealing condition as high as 1 100*C/1Os was observed. For boron implanted structures, as indicated by SIMS depth profiling, structures annealed at 1000*C/10s exhibit a so-called critical condition for boron diffusion through a 30 Å gate oxide. Boron dopant penetration is clearly observed for 60 Å gate oxides at an annealing condition of 1050 0C/10s. The flatband voltage shift can be as high as 0.56 volts as indicated by C-V measurements for boron penetrated gate oxides. However, 100 Å gate oxides are good diffusion barriers for boron at an annealing condition of 1100°C/10s. For BF2 implanted structures, the diffusion behavior is consistent with behavior reported in the literature.


2001 ◽  
Vol 39 (1-4) ◽  
pp. 151-159 ◽  
Author(s):  
Woo Seok Yang ◽  
Nam Kyeong Kim ◽  
Seung Jin Yeom ◽  
Soon Yong Kweon ◽  
Eun Seok Choi ◽  
...  

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