Laser–Assisted Mos/Sos Transistor Fabrication

1981 ◽  
Vol 4 ◽  
Author(s):  
L.D. Hess ◽  
S.A. Kokorowski ◽  
G.L. Olson ◽  
Y.M. Chi ◽  
A. Gupta ◽  
...  

ABSTRACTCW laser annealing techniques were incorporated into standard MOS/SOS transistor fabrication procedures and found to be advantageous as compared to conventional furnace methods for electrical activation of ion–implanted source/drain dopants for both N- and P–MOS transistors. Static electrical characteristics of 2.4 μm channel–length transistors are similar for both types of annealing, whereas the speed of devices with cw laser annealed source–drain regions is increased 10 to 40%, depending on the operating voltage.

1981 ◽  
Vol 4 ◽  
Author(s):  
G. Auvert ◽  
D. Bensahel ◽  
A. Perio ◽  
F. Morin ◽  
G.A. Rozgonyi ◽  
...  

ABSTRACTExplosive Crystallization occurs in cw laser annealing on a-Si films deposited on glass substrates at laser scan speeds higher than 30 cm/sec. Optical, structural and electrical properties of the crystallized films at various laser scan speeds confirm the existence of two kinds of explosive growth depending on the state of crystallinity of the starting material.


1980 ◽  
Author(s):  
L. D. Hess ◽  
R. A. Forber ◽  
S. A. Kokorowski ◽  
G. L. Olson

1999 ◽  
Vol 59 (4) ◽  
pp. 2986-2994 ◽  
Author(s):  
G. Vitali ◽  
C. Pizzuto ◽  
G. Zollo ◽  
D. Karpuzov ◽  
M. Kalitzova ◽  
...  

1980 ◽  
Vol 1 ◽  
Author(s):  
J. C. C. Fan ◽  
R. L. Chapman ◽  
J. P. Donnelly ◽  
G. W. Turner ◽  
C. O. Bozler

ABSTRACTA scanned cw Nd: YAG laser was used to anneal ion-implanted GaAs and InP wafers. Measurements show that electrical activation is greater for p-type than for n-type dopants in GaAs, while in InP, the opposite is observed. A simple Fermi-level pinning model is presented to explain not only the electrical properties we have measured, but also those observed by other workers. We have fabricated GaAs and InP solar cells with junctions formed by ion implantation followed by laser annealing. The GaAs cells have much better conversion efficiencies than the InP cells, and this difference can be explained in terms of the model.


1980 ◽  
Vol 36 (3) ◽  
pp. 202-203 ◽  
Author(s):  
H. Okabayashi ◽  
M. Yoshida ◽  
K. Ishida ◽  
T. Yamane

1974 ◽  
Vol 45 (10) ◽  
pp. 4514-4519 ◽  
Author(s):  
Osamu Kudoh ◽  
Kunio Nakamura ◽  
Mototaka Kamoshida

1981 ◽  
Vol 4 ◽  
Author(s):  
J. P. Gonchond ◽  
G. A. Rozgonyi ◽  
D. Bois

ABSTRACTEBIC and voltage contrast SEM microscopy, combined with optical microscopy. chemical etching and Talystep profiling have been used to investigate cw laser annealing of a-Si in the slip-free SPE regime. Special attention is devoted to the edges and extremities of the line scans, i.e. to the c-to a-Si boundary. At very low power, evidence is given for an initial reordering and thus electrical activation stage of the a-Si. For the higher power range regrowth occurs through two different processes. The EBIC yield is interpreted in terms of a balance between annealing of the ion implantation damage and defect generation in the si substrate during the laser annealing. These results are extended to the case of a scanned electron beam annealing.


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