Formation of Raised Source/Drain Junctions by Rapid Thermal Chemical Vapor Deposition

1995 ◽  
Vol 387 ◽  
Author(s):  
Mehmet C. Öztürk ◽  
Jimmie J. Wortman

AbstractIn this paper, we present alternative uses of rapid thermal chemical vapor deposition (RTCVD) in forming junctions for the raised source/drain MOSFET. The results will include applications of epitaxial silicon, SixGe1−x and TiSi2 all selectively deposited in dedicated coldwalled, lamp heated high or ultra high vacuum RTCVD reactors. Two general approaches will be considered : 1) ultra shallow junction formation in silicon followed by a selective deposition process to form a raised contact, 2) selective deposition to obtain a layer that can be used as a solid diffusion source and as a sacrificial layer for self-aligned silicide formation. In the first approach, junctions are formed typically by low energy ion-implantation. In this paper, we present rapid thermal vapor phase doping (RTVPD) as an alternative to ion-implantation to form defect free ultra-shallow junctions in Si. The method involves exposing a silicon wafer to a dopant gas (such as B2H6) at a moderate temperature (∼600°C) for a short time and subsequent annealing for drive-in. This is followed by either selective epitaxy and conventional self-aligned TiSi2 formation or selective deposition of a low-resistivity C54 TiSi2 from TiCl4 and SiH4. In the second approach, first, a semiconductor (Si, polysilicon or SixGe1−x) is deposited selectively. If the material is undoped, doping can be achieved by ion-implantation. In-situ doping is also possible as will be shown with p- and n-type SixGe1−x at temperatures as low as 625°C using B2H6 or PH3. The doped layer is then used as a solid diffusion source to form the junctions by out-diffusion. Using these different approaches, we present examples of high quality junctions in Si as shallow as a few hundred angstroms. The techniques are compared based upon their robustness, complexity, equipment and thermal budget requirements.

1989 ◽  
Vol 165 ◽  
Author(s):  
T. Hsu ◽  
B. Anthony ◽  
L. Breaux ◽  
S. Banerjee ◽  
A. Tasch

AbstractLow temperature processing will be an essential requirement for the device sizes, structures, and materials being considered for future integrated circuit applications. In particular, low temperature silicon epitaxy will be required for new devices and technologies utilizing three-dimensional epitaxial structures and silicon-based heterostructures. A novel technique, Remote Plasma-enhanced Chemical Vapor Deposition (RPCVD), has achieved epitaxial silicon films at a temperature as low as 150°C which is believed to be the lowest temperature to date for silicon epitaxy. The process relies on a stringent ex-situ preparation procedure, a controlled wafer loading sequence, and an in-situ remote hydrogen plasma clean of the sample surface, all of which provide a surface free of carbon, oxygen, and other contaminants. The system is constructed using ultra-high vacuum technology (10-10 Torr) to achieve and maintain contaminantion-free surfaces and films. Plasma excitation of argon is used in lieu of thermal energy to provide energetic species that dissociate silane and affect surface chemical processes. Excellent crystallinity is observed from the thin films grown at 150°C using the analytical techniques of Transmission Electron Microscopy (TEM) and Nomarski interference contrast microscopy after defect etching.


1986 ◽  
Vol 71 ◽  
Author(s):  
J.M. Deblasi ◽  
D.K. Sadana ◽  
M.H. Norcott

AbstractThe influence of B and As ion implantation on the location and density of interfacial tunnels, the extent of lateral encroachment, the amount of silicon consumed, and the crystallographic defects in CMOS source/drain structures following selective chemical vapor deposition of tungsten has been characterized.


1992 ◽  
Vol 259 ◽  
Author(s):  
Xiaoli Xu ◽  
R. T. Kuehn ◽  
J. M. Melzak ◽  
G. A. Hames ◽  
J. J. Wortman ◽  
...  

ABSTRACTVarious surface pre-cleaning processes for rapid thermal in-situ polysilicon/oxide/silicon stacked gate formation have been evaluated. MOS capacitors have been fabricated to assess the effects of surface pre-cleaning on the quality of both Rapid Thermal Oxide (RTO) and Rapid Thermal Chemical Vapor Deposition (RTCVD) oxide. Measurement results have shown that, 1) High temperature (≥ 900 °C) rapid thermal cleaning in Ar, H2 or high vacuum (10−8 Torr) ambients can lead to MOS gates with high leakage current if RTO is used to form the gate oxide, 2) The standard Huang clean and ultra-violet ozone (UV/O3) treatments can improve the film quality for both deposited and thermally grown oxide, and 3) Compared with RTO, the breakdown field of the RTCVD oxide is less dependent on the surface pre-cleaning treatment. These results indicate that silicon wafer surface cleaning techniques typically used for silicon epitaxial processes are not necessarily applicable to oxide film formation in RTP reactors.


1993 ◽  
Vol 334 ◽  
Author(s):  
Katherine E. Violette ◽  
Mahesh K. Sanganeria ◽  
Mehmet C. Öztürk ◽  
Gari Harris ◽  
Dennis M. Maher

AbstractSilicon nucleation on silicon dioxide and selective silicon epitaxial growth (SEG) were studied in an ultra high vacuum rapid thermal chemical vapor deposition (UHV-RTCVD) reactor. Experiments were performed using 10% Si2H6 in H2 in a pressure range of 10 - 100 mTorr at 760°C. Under these conditions, the growth rate ranged from 75 to 330 nm/minute. Loss of selectivity via Si island formation on SiO2 was studied using scanning electron microscopy (SEM) and atomic force microscopy (AFM) revealing a strong dependence on deposition pressure. Cross sectional transmission electron microscopy (XTEM) was employed to study the vertical oxide/epitaxy interface where faceting can occur. The incubation time for nucleation was found to increase from 10s to 70s as pressure is reduced from 100 mTorr to 10 mTorr, allowing thicker selective epitaxial film growth in spite of the reduced growth rates. This was attributed to the reduction in gas phase supersaturation of the Si containing species resulting in a lower density of adsorbed atoms on the SiO2 surface. This process shows a potential for chlorine free selective epitaxial growth and provides insight to the surface morphology of polycrystalline films deposited at low pressures.


1996 ◽  
Vol 429 ◽  
Author(s):  
John M. Grant ◽  
Ming Ang ◽  
Lynn R. Allen

AbstractSelective deposition of SiGe alloys by rapid thermal deposition has been studied using a commercially available Rapid Thermal Chemical Vapor Deposition (RTCVD) cluster tool. The precursors used in this work were dichlorosilane and germane diluted in either hydrogen or argon. An initial characterization was performed to find the appropriate temperature and GeH4 flow ranges to deposit epitaxial layers with low surface roughness. For layers with higher germanium concentration lower deposition temperatures are required to minimize surface roughness. The effects of the dilutant gas on the deposition were examined. An H2 dilutant affects the deposition by consuming chlorine released by the SiCl2H2 and forming HCI. When Ar is used as the dilutant, more chlorine is available for other reactions that can result in etching of the silicon surface. Finally, the effects of pre-deposition treatment were determined. When compared to a wet HF dip, a gas/vapor phase HF/methanol native oxide removal treatment appears to increase the initiation time for the epitaxial deposition reaction. This is most likely due to increased fluorine termination of the surface. When a wet HF or HF/methanol native oxide removal is followed by a UV-Cl2 process, the deposition reaction initiation time is reduced. The UV-Cl2 process was also found to etch silicon through the native oxide.


1990 ◽  
Vol 198 ◽  
Author(s):  
J. W. Osenbach ◽  
Y. H. Ku ◽  
A. Kermani

ABSTRACTRapid Thermal Chemical Vapor Deposition (RTCVD) offers great promise for deposition of high-quality, thin, abrupt interface epitaxial films. In addition, RTCVD systems operate under cold wall environment to minimize particles and cross contamination. SEG of silicon provides both isolation and active device wells with fine dimensional control. A combination of RTCVD and SEG holds great promise for future VLSI circuit technologies. In this paper, we present our results on selective growth of single crystal silicon using RTCVD.


1994 ◽  
Vol 343 ◽  
Author(s):  
Katherine E. Violette ◽  
Mehmet C. Öztürk ◽  
Gari Harris ◽  
Mahesh K. Sanganeria ◽  
Archie Lee ◽  
...  

A study of Si nucleation and deposition on SiO2 was performed using disilane and hydrogen in an ultra high vacuum rapid thermal chemical vapor deposition reactor in pressure and temperature ranges of 0.1 – 1.5 Torr and 625 – 750°C. The film analysis was carried out using scanning electron microscopy, transmission electron microscopy and atomic force microscopy. At lower pressures, an incubation time exists which leads to a retardation in film nucleation. At 750°C, the incubation time is 10s at 0.1 Torr and decreases to less than Is at 1.5 Torr. The nuclei grow and form three dimensional islands on S1O2, and as they coalesce, result in a rough surface morphology. At higher pressures, the inherent selectivity is lost resulting in a higher nucleation density and smoother surface morphology. For ˜ 2000 Å thick films, the root-mean-square surface roughness at 750ÅC ranges from 110Å at 0.1 Torr to 40Å at 1.5 Torr. Temperature also strongly influences the film structure through surface mobility and grain growth. At 1 Torr, the roughness ranges from 3Å at 625°C to 60Å at 750°C. The grain structure at 625°C/1Torr appears to be amorphous, whereas at 750°C the structure is columnar. The growth rate at 625°C/1.5 Torr is 1200 Å/min provides a surface roughness on the order of atomic dimensions which is comparable to or better than amorphous silicon deposited in LPCVD furnaces.


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