Process Integration Of Low-Dielectric-Constant Materials

1995 ◽  
Vol 381 ◽  
Author(s):  
Shin-Puu Jeng ◽  
Kelly Taylor ◽  
Mi-Chang Chang ◽  
Larry Ting ◽  
Charles Lee ◽  
...  

AbstractAs device geometries and operating voltage continue to scale while functional density increases, it is imperative to reduce the RC time delay. The replacement of Si0 2 as an intermetal dielectric with an insulator of lower dielectric constant is a particularly attractive solution since it provides immediate performance improvement through reduction in capacitance. An embedded polymer integration scheme improves the interconnect performance through line-to-line capacitance reduction by using polymer only between tightly spaced lines. The gapfill polymeric materials do not degrade the electromigration performance of standard multilayered TiN/Al/TiN interconnects. Embedded polymers alleviate many of the integration and reliability problems associated with polymer integration, and can be easily adopted into a standard production process.

1996 ◽  
Vol 443 ◽  
Author(s):  
Neil H. Hendricks

AbstractFor over two years, intensive efforts at SEMATECH and elsewhere have focused on identifying low dielectric constant (low ε) materials which possess all of the required properties and processing characteristics needed for integration into standard IC fabrication lines. To date, no material candidate has been shown to satisfy this impressive list of requirements. For some candidates, drawbacks related to material properties such as poor thermal stability or electrical performance have been identified; in other cases, problems in process integration, for example difficulties in patterning have stalled progress.In this paper, most of the current leading candidates for the low ε IC IMC application are identified and discussed. An attempt is made to correlate structure/property relationships in these materials with their relative attributes and deficiencies as they relate to the IMD application. Key differences in chemistry and property/processing characteristics are contrasted for low c silicon-oxygen polymers and for purely organic polymers. Novel dielectrics such as porous organic and inorganic thin films are also discussed in terms of their properties and associated process integration challenges. Since the needs for global planarization and low c IMD are occurring within roughly the same generation of minimum feature size (˜ 0.25 μm), the chemical mechanical polishing (CMP) of low dielectric constant thin films and/or of SiO2 layers deposited above them is briefly discussed. Both subtractive metalization and damascene processes are included, and the required low dielectric constant film properties and processing characteristics are contrasted for each process. Finally, the author's views on future trends in low dielectric constant materials development are presented, with an emphasis on identifying the types of chemical structures which may prove viable for this most demanding of all polymer film applications.


1999 ◽  
Vol 565 ◽  
Author(s):  
Hideki Gomi ◽  
Koji Kishimoto ◽  
Tatsuya Usami ◽  
Ken-ichi Koyanagi ◽  
Takashi Yokoyama ◽  
...  

AbstractThe technologies utilizing Fluorinated Silicon Oxide (FSG, k=3.6) and Hydrogen Silsesquioxane (HSQ, k=3.0) have been established for 0.25-μm and 0.18-μm generation ULSIs. However, low-k materials for the next generation ULSIs, which have a dielectric constant of less than 3.0, have not become mature yet. In this paper, we review process integration issues in applying FSG and HSQ, and describe integration results and device performance using Fluorinated Amorphous Carbon (a-C:F, k=2.5) as one of the promising low-k materials for the next generation ULSIs.


1997 ◽  
Vol 476 ◽  
Author(s):  
Nigel P. Hacker ◽  
Gary Davis ◽  
Lisa Figge ◽  
Todd Krajewski ◽  
Scott Lefferts ◽  
...  

Low dielectric constant materials (k < 3.0) have the advantage that higher performance IC devices may be manufactured with minimal increases in chip size. The reduced capacitance given by these materials permits shrinking spacing between metal lines to below 0.25 μm and the ability to decrease the number of levels of metal in a device. The technologies being considered for low k applications are CVD or spin-on of inorganic or organic polymeric materials. Traditional spin-on silicates or siloxanes have been used as planarizing dielectrics during the last 15 years and usually have k > 3.0.


1999 ◽  
Vol 564 ◽  
Author(s):  
Hideki Gomi ◽  
Koji Kishimoto ◽  
Tatsuya Usami ◽  
Ken-ichi Koyanagi ◽  
Takashi Yokoyama ◽  
...  

AbstractThe technologies utilizing Fluorinated Silicon Oxide (FSG, k=3.6) and Hydrogen Silsesquioxane (HSQ, k=3.0) have been established for 0.25-µm and 0.1 8-µm generation ULSIs. However, low-k materials for the next generation ULSIs, which have a dielectric constant of less than 3.0, have not become mature yet. In this paper, we review process integration issues in applying FSG and HSQ, and describe integration results and device performance using Fluorinated Amorphous Carbon (a-C:F, k=2.5) as one of the promising low-k materials for the next generation ULSIs.


1995 ◽  
Vol 381 ◽  
Author(s):  
J. T. Wetzel ◽  
Y. T. Lii ◽  
S. M. Filipiak ◽  
B.-Y. Nguyen ◽  
E. O. Travis ◽  
...  

AbstractAs device geometries continue to scale down, a larger portion of the circuit delay is contributed by interconnects, and the majority of this delay is due to capacitive loading. The replacement of plasma-deposited SiO2 as an intermetal dielectric with an insulator of lower dielectric constant can provide performance improvement through the reduction of capacitance.A commercially available polyimide, BiPhenylene DiAnhydride – Phenylene DiAmine, BPDA-PDA, with an out-of-plane dielectric constant 3.0, is evaluated by integration with AI(Cu) in a double level metal, BiCMOS 4MB SRAM device, with 0.5μm groundrules. Process challenges unique to integration of an organic rather than inorganic insulator are described and experimental features concerning process integration, particularly via etch, Al(Cu) deposition, adhesion and moisture management are presented.


MRS Bulletin ◽  
1997 ◽  
Vol 22 (10) ◽  
pp. 33-38 ◽  
Author(s):  
Nigel P. Hacker

Low-dielectric-constant materials (k < 3.0) have the advantage of facilitating manufacture of higher performance integrated-circuit (IC) devices with minimal increases in chip size. The reduced capacitance given by these materials permits shrinkage of spacing between metal lines to below 0.25 μm and the ability to decrease the number of levels of metal in a device. The technologies being considered for low-k applications are chemical vapor deposition (CVD) or spin-on of polymeric materials. For both types of processes, there are methods and materials capable of giving k < 3.0 dielectric stacks. This article will focus on the spin-on approach and discuss the properties of both organic and inorganic spin-on polymers.While CVD SiO2 has been the mainstay of the industry, spin-on materials are appropriate for many dielectric applications. Polyimides have applications as electrical insulators, and traditional spin-on silicates or siloxanes (k > 3.0) have served as planarizing dielectrics during the last 15 years. The newer spin-on polymers have greatly enhanced mechanical, thermal, and chemical properties, exhibiting lower dielectric constants than the traditional materials.


2004 ◽  
Vol 151 (6) ◽  
pp. F146 ◽  
Author(s):  
Shou-Yi Chang ◽  
Tzu-Jen Chou ◽  
Yung-Cheng Lu ◽  
Syun-Ming Jang ◽  
Su-Jien Lin ◽  
...  

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