Extrinsic Gettering with Epitaxial Misfit Dislocations

1984 ◽  
Vol 36 ◽  
Author(s):  
Ali S. M. Salih ◽  
W. Maszara ◽  
H. J. Kim ◽  
G. A. Rozgonyi

ABSTRACTNew results are presented on Ge doped Si epitaxial layers which contain interfacial misfit dislocations. Microscopic and chemical analyses showed the preferential gettering of several metallic species (Au, Cu, Ni, and Fe) at the misfit dislocations with semiquantitative correlation between dislocation density and the captured impurity concentration. Wafer curvature was measured and shown to be less than that for typical Si3N4 and SiO2 layers used in IC fabrication. The reduction of Schottky diode leakage current has been clearly demonstrated and attributed to gettering of residual impurities, as well as signifying that, the active surface device region is not deleteriously affected by spurious defect reactions at the buried epitaxial interface.

1991 ◽  
Vol 239 ◽  
Author(s):  
Richard Beanland

ABSTRACTIt is well known that it becomes energetically favourable for misfit dislocations to be introduced into strained epitaxial layers above a certain ‘critical’ layer thickness, hc. To date, theoretical calculations of hc have only been made for cases of isotropie misfit - i.e. cases where the misfit is the same for every direction in the interface. Using a new formulation of the Frank-Bilby equation and the concept of coherency dislocations, it is now possible to treat cases of anisotropie misfit, such as silicon on sapphire (SOS). The method used to obtain the critical thickness is described, and values of hc and equilibrium dislocation density are given for various materials systems.


2021 ◽  
Vol 118 (12) ◽  
pp. 122102
Author(s):  
Qinglong Yan ◽  
Hehe Gong ◽  
Jincheng Zhang ◽  
Jiandong Ye ◽  
Hong Zhou ◽  
...  

2013 ◽  
Vol 717 ◽  
pp. 113-116
Author(s):  
Sani Klinsanit ◽  
Itsara Srithanachai ◽  
Surada Ueamanapong ◽  
Sunya Khunkhao ◽  
Budsara Nararug ◽  
...  

The effect of soft X-ray irradiation to the Schottky diode properties was analyzed in this paper. The built-in voltage, leakage current, and work function of Schottky diode were investigated. The current-voltage characteristics of the Schottky diode are measured at room temperature. After irradiation at 70 keV for 55 seconds the forward current and leakage current are increase slightly. On the other hand, the built-in voltage is decrease from the initial value about 0.12 V. Consequently, this method can cause the Schottky diode has low power consumption. The results show that soft X-ray can improve the characteristics of Schottky diode.


1999 ◽  
Vol 594 ◽  
Author(s):  
M. E. Ware ◽  
R. J. Nemanich

AbstractThis study explores stress relaxation of epitaxial SiGe layers grown on Si substrates with unique orientations. The crystallographic orientations of the Si substrates used were off-axis from the (001) plane towards the (111) plane by angles, θ = 0, 10, and 22 degrees. We have grown 100nm thick Si(1−x) Ge(x) epitaxial layers with x=0.3 on the Si substrates to examine the relaxation process. The as-deposited films are metastable to the formation of strain relaxing misfit dislocations, and thermal annealing is used to obtain highly relaxed films for comparison. Raman spectroscopy has been used to measure the strain relaxation, and atomic force microscopy has been used to explore the development of surface morphology. The Raman scattering indicated that the strain in the as-deposited films is dependent on the substrate orientation with strained layers grown on Si with 0 and 22 degree orientations while highly relaxed films were grown on the 10 degree substrate. The surface morphology also differed for the substrate orientations. The 10 degree surface is relatively smooth with hut shaped structures oriented at predicted angles relative to the step edges.


2005 ◽  
Vol 14 (2) ◽  
pp. 96-100 ◽  
Author(s):  
Heon-Bok Lee ◽  
Kyong-Hum Baek ◽  
Myung-Bok Lee ◽  
Jung-Hee Lee ◽  
Sung-Ho Hahm

2014 ◽  
Vol 2014 (HITEC) ◽  
pp. 000058-000060
Author(s):  
Tomas Hjort ◽  
Adolf Schöner ◽  
Andy Zhang ◽  
Mietek Bakowski ◽  
Jang-Kwon Lim ◽  
...  

Electrical characteristics of 4H-SiC Schottky barrier diodes, based on buried grid design are presented. The diodes, rated to 1200V/10A and assembled into high temperature capable TO254 packages, have been tested and studied up to 250°C. Compared to conventional SiC Schottky diodes, Ascatron's buried grid SiC Schottky diode demonstrates several orders of magnitude reduced leakage current at high temperature operation.


2015 ◽  
Vol 24 (03n04) ◽  
pp. 1520009 ◽  
Author(s):  
Tedi Kujofsa ◽  
John E. Ayers

The inclusion of metamorphic buffer layers (MBL) in the design of lattice-mismatched semiconductor heterostructures is important in enhancing reliability and performance of optical and electronic devices. These metamorphic buffer layers usually employ linear grading of composition, and materials including InxGa1-xAs and GaAs1-yPy have been used. Non-uniform and continuously graded profiles are beneficial for the design of partially-relaxed buffer layers because they reduce the threading dislocation density by allowing the distribution of the misfit dislocations throughout the metamorphic buffer layer, rather than concentrating them at the interface where substrate defects and tangling can pin dislocations or otherwise reduce their mobility as in the case of uniform compositional growth. In this work we considered heterostructures involving a linearly-graded (type A) or step-graded (type B) buffer layer grown on a GaAs (001) substrate. For each structure type we present minimum energy calculations and compare the cases of cation (Group III) and anion (Group V) grading. In addition, we studied the (i) average and surface in-plane strain and (ii) average misfit dislocation density for heterostructures with various thickness and compositional profile. Moreover, we show that differences in the elastic stiffness constants give rise to significantly different behavior in these two commonly-used buffer layer systems.


1999 ◽  
Vol 572 ◽  
Author(s):  
S. Nishino ◽  
K. Matsumoto ◽  
Y. Chen ◽  
Y. Nishio

ABSTRACTSiC is suitable for power devices but high quality SiC epitaxial layers having a high breakdown voltage are needed and thick epilayer is indispensable. In this study, CST method (Close Space Technique) was used to rapidly grow thick epitaxial layers. Source material used was 3C-SiC polycrystalline plate of high purity while 4H-SiC(0001) crystals inclined 8° off toward <1120> was used for the substrate. Quality of the epilayer was influenced significantly by pressure during growth and polarity of the substrate. A p-type conduction was obtained by changing the size of p-type source material. The carrier concentration of epilayer decreased when a lower pressure was employed. Schottky diode was also fabricated.


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