Enhanced Gate Oxide Reliability through Fluorine Incorporation and the Influence of Polysilicon Process Variations

1991 ◽  
Vol 225 ◽  
Author(s):  
K. P. MacWilliams ◽  
L. E. Lowry ◽  
S. T. Lin ◽  
M. Song ◽  
R. Cole ◽  
...  
Keyword(s):  
Dielectric Breakdown ◽  
Low Frequency ◽  
Process Variations ◽  
Interface State ◽  
State Density ◽  
Apparent Lack ◽  
Hot Carrier ◽  
Quality And Reliability ◽  
Fluorinated Oxides ◽  
The Impact

ABSTRACTThere has been some uncertainty as to the impact of fluorine (F) on SiO2 quality and reliability. Several laboratories have shown greatly enhanced quality and reliability with fluorinated oxides, while others have been unable to repeat the results. In addition, the laboratories which have shown enhanced reliability with the fluorinated oxides have differed in their interpretation of the mechanism by which the enhancement occurs. X-ray diffraction stress measurements, partial time dependent dielectric breakdown (TDDB) measurements, SIMS depth profiling, transmission electron microscopy, standard high/low frequency C-V measurements, and hot-carrier aging of variously processed MOSFETs have been used to investigate a variety of fluorinated films. We believe that the apparent lack of consistency of the effects of fluorine on MOSFET reliability between laboratories may be explained by slight variations in the gate polysilicon processing which result in variations in polysilicon morphology. The polysilicon morphology determines both mechanical stress and F diffusion which ultimately impacts interface state density and thus hot carrier reliability.

scholarly journals Investigation of the Impact of Hot-Carrier-Induced Interface State Generation on Carrier Mobility in nMOSFET

2021 ◽  
pp. 1-8
Author(s):  
Zhicheng Wu ◽  
Jacopo Franco ◽  
Brecht Truijen ◽  
Philippe Roussel ◽  
Ben Kaczer ◽  
...  
Keyword(s):  
Carrier Mobility ◽  
Interface State ◽  
Hot Carrier ◽  
State Generation ◽  
The Impact

The Properties Of a-Si:H/c-Si Heterostructures Prepared By 55 kHz Pecvd For Solar Cell Application

1997 ◽  
Vol 485 ◽  
Author(s):  
B. G Budaguan ◽  
A. A. Aivazov ◽  
A. A. Sherchenkov ◽  
A. V Blrjukov ◽  
V. D. Chernomordic ◽  
...  
Keyword(s):  
Crystalline Silicon ◽  
Low Frequency ◽  
Reverse Current ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Solar Cell Application ◽  
Current Voltage ◽  
Frequency Plasma ◽  
Device Applications

AbstractIn this work a-Si:H/c-Si heterostructures with good electronic properties of a-Si:H were prepared by 55 kHz Plasma Enhanced Chemical Vapor Deposition (PECVD). Currentvoltage and capacitance-voltage characteristics of a-Si:H/c-Si heterostructures were measuredto investigate the influence of low frequency plasma on the growing film and amorphous silicon/crystalline silicon boundary. It was established that the interface state density is low enough for device applications (<2.1010 cm−2). The current voltage measurements suggest that, when forward biased, space-charge-limited current determines the transport mechanism in a- Si:H/c-Si heterostructures, while reverse current is ascribed to the generation current in a-Si:H and c-Si depletion layers.

A STUDY OF THE ELECTRICAL PROPERTIES OF Al2O3 FILMS DEPOSITED ON GaAs SUBSTRATES BY SPRAY PYROLYSIS

2002 ◽  
Vol 09 (05n06) ◽  
pp. 1637-1640 ◽  
Author(s):  
J. CHAVEZ-RAMIREZ ◽  
M. AGUILAR-FRUTIS ◽  
M. GARCIA ◽  
E. MARTINEZ ◽  
O. ALVAREZ-FREGOSO ◽  
...  
Keyword(s):  
Aluminum Oxide ◽  
Spray Pyrolysis ◽  
Electric Fields ◽  
Dielectric Breakdown ◽  
Spray Pyrolysis Technique ◽  
Interface State ◽  
State Density ◽  
Oxide Semiconductor ◽  
Electrical Characteristics ◽  
Gaas Substrates

Electrical characteristics of high quality aluminum oxide thin films deposited by the spray pyrolysis technique on GaAs substrates are reported. The films were deposited using a spraying solution of aluminum acetylacetonate in N,N-dimethylformamide and an ultrasonic mist generator. The substrates were (100) GaAs wafers Si-doped (1018 cm -3). The substrate temperature during deposition was in the range of 300–600°C. The electrical characteristics of these films were determined by capacitance and current versus voltage measurements by the incorporation of these films into metal-oxide-semiconductor structures. The interface state density resulted in the order of 1012 1/ eV-cm 2 and the films can stand electric fields higher than 5 MV/cm, without observing a destructive dielectric breakdown. The refractive index, measured by ellipsometry at 633 nm, resulted close to 1.64. The determination of the chemical composition of the films was achieved by energy dispersive X-ray spectroscopy; it resulted close to that of stoichiometric aluminum oxide (O/Al = 1.5) when films are deposited at substrate temperatures of 300–350°C.

scholarly journals Oxide Degradation Effects in Dry Patterning of Resist Using Neutral Oxygen Beams

1992 ◽  
Vol 268 ◽  
Author(s):  
Walter E. Mlynko ◽  
Srinandan R. Kasi ◽  
Dennis M. Manos
Keyword(s):  
Dielectric Breakdown ◽  
Electrical Characterization ◽  
Plasma Source ◽  
Interface State ◽  
State Density ◽  
Low Energy ◽  
Carrier Injection ◽  
Polysilicon Gate ◽  
Atomic Beams ◽  
Novel Processing

ABSTRACTNovel processing methods are being studied to address the highly selective and directional etch requirements of the ULSI manufacturing era; neutral molecular and atomic beams are two promising candidates. In this study, the potential of 5 eV neutral atomic oxygen beams for dry development of photoresist is demonstrated for application in patterning of CMOS devices. The patterning of photoresist directly on polysilicon gate layers enables the use of a self-contained dry processing strategy, with oxygen beams for resist etching and chlorine beams for polysilicon etching. Exposure to such reactive low-energy species and to the UV radiation from the line-of-sight, high-density plasma source can, however, alter MOSFET gate oxide quality, impacting device performance and reliability. We have studied this process-related device integrity issue by subjecting polysilicon gate MOS structures to exposure treatments of 5–20 eV oxygen beams similar to those used for resist patterning. Electrical characterization shows a significant increase in the oxide trapped charge (30–90x) and interface state density (30–60x) upon low-energy exposure. Current-voltage(IV) and dielectric breakdown characterization show increased low-field leakage characteristics for the same exposure. High-field electron injection studies reveal that the 0.25–V to 0.5–V negative flatband shifts (measured after oxygen beam exposure) can be partially annealed by carrier injection. This could be due to positive charge annihilation or electron trapping, or some combination of both. SEM and electrical analysis of structures exposed to neutral beam processing are presented along with the results of thermal annealing treatments.

Low- and High-Frequency C–V Characteristics of Au/n-GaN/n-GaAs

2018 ◽  
Vol 18 (06) ◽  
pp. 1850039
Author(s):  
Abderrezzaq Ziane ◽  
Mohamed Amrani ◽  
Abdelaziz Rabehi ◽  
Zineb Benamara
Keyword(s):  
Schottky Diode ◽  
High Frequency ◽  
High Vacuum ◽  
Low Frequency ◽  
Interface State ◽  
Interface States ◽  
State Density ◽  
Ultra High Vacuum ◽  
Active Nitrogen ◽  
Capacitance Voltage

Au/GaN/GaAs Schottky diode created by the nitridation of n-GaAs substrate which was exposed to a flow of active nitrogen created by a discharge source with high voltage in ultra-high vacuum with two different thicknesses of GaN layers (0.7[Formula: see text]nm and 2.2[Formula: see text]nm), the I–V and capacitance–voltage (C–V) characteristics of the Au/n-GaN/n-GaAs structures were studied for low- and high-frequency at room temperature. The measurements of I–V of the Au/n-GaN/n-GaAs Schottky diode were found to be strongly dependent on bias voltage and nitridation process. The electrical parameters are bound by the thickness of the GaN layer. The capacitance curves depict a behavior indicating the presence of interface state density, especially in the low frequency. The interface states density was calculated using the high- and low-frequency capacitance curves and it has been shown that the interface states density decreases with increasing of nitridation of the GaAs.

FT-IR, Sims and Electrical Characterization of Si3N4 Thin Films Obtained from C.V.D. Assisted by In-Situ Electrical Discharge

1992 ◽  
Vol 284 ◽  
Author(s):  
B. Balland ◽  
J. C. Bureau ◽  
C. Plossu ◽  
R. Botton
Keyword(s):  
Thin Films ◽  
Electrical Discharge ◽  
Low Frequency ◽  
Electrical Characterization ◽  
Interface State ◽  
State Density ◽  
Flat Band ◽  
Band Shift ◽  
Ft Ir

ABSTRACTAn original process has been developed enabling the fabrication of CVD insulating (Si3N4) thin films, by means of an in-situ activation of the reactions at T < 400°C and under P=1 to 2 torr. Mono-Si substrates were nitrided using a mixture of argon containing SiH4 and NH3·O2 has also been added to the reaction gases. The activation was performed by a DC electrical discharge. The substrate was not used as an electrode and was placed parallel to the discharge current. This configuration minimized the contamination of the films during their formation. The obtained layers have been analyzed using FT-IR and SIMS.M.I.S. structures have been realized, and the flat-band shift ΔVFB and the interface state density Nit have been extracted from the high and low frequency C-V characteristics. The values of the flat-band shift depend on the discharge domain and decrease with temperature. Good electrical characteristics are obtained for thin films formed at low temperature.

Electrical Stability Impact of Gate Oxide in Channel Implanted SiC NMOS and PMOS Transistors

2017 ◽  
Vol 897 ◽  
pp. 513-516 ◽  
Author(s):  
Muhammad I. Idris ◽  
Ming Hung Weng ◽  
H.K. Chan ◽  
A.E. Murphy ◽  
Dave A. Smith ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Gate Oxide ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Single Type ◽  
Electrical Stability ◽  
Wide Range ◽  
Flatband Voltage ◽  
The Impact

Operation of SiC MOSFETs beyond 300°C opens up opportunities for a wide range of CMOS based digital and analogue applications. However the majority of the literature focuses only on the optimization of a single type of MOS device (either PMOS or more commonly NMOS) and there is a lack of a comprehensive study describing the challenge of optimizing CMOS devices. This study reports on the impact of gate oxide performance in channel implanted SiC on the electrical stability for both NMOS and PMOS capacitors and transistors. Parameters including interface state density (Dit), flatband voltage (VFB), threshold voltage (VTH) and effective charge (NEFF) have been acquired from C-V characteristics to assess the effectiveness of the fabrication process in realising high quality gate dielectrics. The performance of SiC based CMOS transistors were analyzed by correlating the characteristics of the MOS interface properties, the MOSFET 1/f noise performance and transistor on-state stability at 300°C. The observed instability of PMOS devices is more significant than in equivalent NMOS devices. The results from MOS capacitors comprising interface state density (Dit), flatband voltage (VFB), threshold voltage (VTH) for both N and P MOS are in agreement with the expected characteristics of the respective transistors.

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