FT-IR, Sims and Electrical Characterization of Si3N4 Thin Films Obtained from C.V.D. Assisted by In-Situ Electrical Discharge

1992 ◽  
Vol 284 ◽  
Author(s):  
B. Balland ◽  
J. C. Bureau ◽  
C. Plossu ◽  
R. Botton
Keyword(s):  
Thin Films ◽  
Electrical Discharge ◽  
Low Frequency ◽  
Electrical Characterization ◽  
Interface State ◽  
State Density ◽  
Flat Band ◽  
Band Shift ◽  
Ft Ir

ABSTRACTAn original process has been developed enabling the fabrication of CVD insulating (Si3N4) thin films, by means of an in-situ activation of the reactions at T < 400°C and under P=1 to 2 torr. Mono-Si substrates were nitrided using a mixture of argon containing SiH4 and NH3·O2 has also been added to the reaction gases. The activation was performed by a DC electrical discharge. The substrate was not used as an electrode and was placed parallel to the discharge current. This configuration minimized the contamination of the films during their formation. The obtained layers have been analyzed using FT-IR and SIMS.M.I.S. structures have been realized, and the flat-band shift ΔVFB and the interface state density Nit have been extracted from the high and low frequency C-V characteristics. The values of the flat-band shift depend on the discharge domain and decrease with temperature. Good electrical characteristics are obtained for thin films formed at low temperature.

FT-IR, SIMS and electrical characterization of Si3N4 thin films obtained from CVD, assisted by in situ electrical discharge

1993 ◽  
Vol 24 (4) ◽  
pp. 389-393
Author(s):  
B. Balland ◽  
R. Botton ◽  
M. Lemiti ◽  
J.C. Bureau ◽  
A. Glachant
Keyword(s):  
Thin Films ◽  
Electrical Discharge ◽  
Electrical Characterization ◽  
Ft Ir

Electrical Properties of Au/Bi4-xLaxTi3O12 Thin Film/Si Structures and Reduction of Interface States

2005 ◽  
Vol 902 ◽  
Author(s):  
Atsushi Kohno ◽  
Hiroyuki Tomari
Keyword(s):  
Interfacial Layer ◽  
Sol Gel ◽  
Frequency Dispersion ◽  
Interface State ◽  
Interface States ◽  
State Density ◽  
Flat Band ◽  
Silicon Substrates ◽  
Ft Ir ◽  
The Ideal

AbstractSub-100nm-Thick Polycrystalline Bi4-xLaxTi3O12 (BLT) thin films have been formed on silicon substrates by sol-gel and spin-coating techniques. The analysis of X-ray reflectivity for the BLT/Si structure showed that the BLT film density was slightly lower than the ideal value and the interfacial layer was formed. By Fourier transform infrared spectroscopy (FT-IR) it is confirmed that the formation of the interfacial layer was due to oxidation of Si. Clockwise hysteresis was observed in capacitance-voltage (C-V) characteristics for Au/BLT/p-Si structures at a frequency range between 1 MHz – 1 kHz. The frequency dispersion of the C-V curve was caused by a large amount of interface states at BLT/Si interface. As the film was crystallized at 550°C for 2 h the maximum interface state density was ∼3.4×1011 cm-2ev-1 at 1 kHz. Also, the negative gate-voltage shift of the C-V curve from the ideal curve and the gate-bias dependence of the flat-band voltage were observed, resulting in the presence of undesirable positive charges in the film and the electron injection to the traps near the BLT/Si interface. By post-annealing of the device at 400 °C in oxygen atmosphere the interface states (fast sates) were successfully reduced to a third of the initial value and also the positive charges were significantly diminished.

The Properties Of a-Si:H/c-Si Heterostructures Prepared By 55 kHz Pecvd For Solar Cell Application

1997 ◽  
Vol 485 ◽  
Author(s):  
B. G Budaguan ◽  
A. A. Aivazov ◽  
A. A. Sherchenkov ◽  
A. V Blrjukov ◽  
V. D. Chernomordic ◽  
...  
Keyword(s):  
Crystalline Silicon ◽  
Low Frequency ◽  
Reverse Current ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
Solar Cell Application ◽  
Current Voltage ◽  
Frequency Plasma ◽  
Device Applications

AbstractIn this work a-Si:H/c-Si heterostructures with good electronic properties of a-Si:H were prepared by 55 kHz Plasma Enhanced Chemical Vapor Deposition (PECVD). Currentvoltage and capacitance-voltage characteristics of a-Si:H/c-Si heterostructures were measuredto investigate the influence of low frequency plasma on the growing film and amorphous silicon/crystalline silicon boundary. It was established that the interface state density is low enough for device applications (<2.1010 cm−2). The current voltage measurements suggest that, when forward biased, space-charge-limited current determines the transport mechanism in a- Si:H/c-Si heterostructures, while reverse current is ascribed to the generation current in a-Si:H and c-Si depletion layers.

Properties of Thin SiO2 Films with In-Situ Deposition of Poly Si Electrodes

1989 ◽  
Vol 146 ◽  
Author(s):  
Paihung Pan ◽  
Ahmad Kermani ◽  
Wayne Berry ◽  
Jimmy Liao
Keyword(s):  
Electrical Properties ◽  
Breakdown Strength ◽  
Chemical Vapor ◽  
Interface State ◽  
State Density ◽  
In Situ Deposition ◽  
Different Temperatures ◽  
Flatband Voltage ◽  
Si Films

ABSTRACTElectrical properties of thin (12 nm) SiO2 films with and without in-situ deposited poly Si electrodes have been studied. Thin SiO2 films were grown by the rapid thermal oxidation (RTO) process and the poly Si films were deposited by the rapid thermal chemical vapor deposition (RTCVD) technique at 675°C and 800°C. Good electrical properties were observed for SiO2 films with thin in-situ poly Si deposition; the flatband voltage was ∼ -0.86 V, the interface state density was < 2 × 1010/cm2/eV, and breakdown strength was > 10 MV/cm. The properties of RTCVD poly Si were also studied. The grain size was 10-60 rim before anneal and was 50-120 rim after anneal. Voids were found in thin (< 70 nm) RTCVD poly Si films. No difference in either SiO2 properties or poly Si properties was observed for poly Si films deposited at different temperatures.

Low Interface State Density Oxide-GaAs Structures Fabricated by In-Situ Molecular Beam Epitaxy

1996 ◽  
Vol 421 ◽  
Author(s):  
M. Passlack ◽  
M. Hong
Keyword(s):  
Molecular Beam Epitaxy ◽  
Molecular Beam ◽  
Molecular Beams ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
In Situ Deposition ◽  
Interface Recombination Velocity ◽  
Recombination Velocity

AbstractWe have extended the spectrum of molecular-beam epitaxy (MBE) related techniques by introducing in-situ deposition of oxides. The oxide films have been deposited on clean, atomically ordered (100) GaAs wafer surfaces using molecular beams of gallium-, magnesium-, silicon-, or aluminum oxide. Among the fabricated oxide-GaAs heterostructures, Ga2O3-GaAs interfaces exhibit unique electronic properties including an interface state density Dit in the low 1010 cm−2eV−1 range and an interface recombination velocity S of 4000 cm/s. The formation of inversion layers in both n- and p-type GaAs has been clearly established. Further, thermodynamic and photochemical stability of excellent electronic interface properties of Ga2O3-GaAs structures has been demonstrated.

scholarly journals Oxide Degradation Effects in Dry Patterning of Resist Using Neutral Oxygen Beams

1992 ◽  
Vol 268 ◽  
Author(s):  
Walter E. Mlynko ◽  
Srinandan R. Kasi ◽  
Dennis M. Manos
Keyword(s):  
Dielectric Breakdown ◽  
Electrical Characterization ◽  
Plasma Source ◽  
Interface State ◽  
State Density ◽  
Low Energy ◽  
Carrier Injection ◽  
Polysilicon Gate ◽  
Atomic Beams ◽  
Novel Processing

ABSTRACTNovel processing methods are being studied to address the highly selective and directional etch requirements of the ULSI manufacturing era; neutral molecular and atomic beams are two promising candidates. In this study, the potential of 5 eV neutral atomic oxygen beams for dry development of photoresist is demonstrated for application in patterning of CMOS devices. The patterning of photoresist directly on polysilicon gate layers enables the use of a self-contained dry processing strategy, with oxygen beams for resist etching and chlorine beams for polysilicon etching. Exposure to such reactive low-energy species and to the UV radiation from the line-of-sight, high-density plasma source can, however, alter MOSFET gate oxide quality, impacting device performance and reliability. We have studied this process-related device integrity issue by subjecting polysilicon gate MOS structures to exposure treatments of 5–20 eV oxygen beams similar to those used for resist patterning. Electrical characterization shows a significant increase in the oxide trapped charge (30–90x) and interface state density (30–60x) upon low-energy exposure. Current-voltage(IV) and dielectric breakdown characterization show increased low-field leakage characteristics for the same exposure. High-field electron injection studies reveal that the 0.25–V to 0.5–V negative flatband shifts (measured after oxygen beam exposure) can be partially annealed by carrier injection. This could be due to positive charge annihilation or electron trapping, or some combination of both. SEM and electrical analysis of structures exposed to neutral beam processing are presented along with the results of thermal annealing treatments.

Low- and High-Frequency C–V Characteristics of Au/n-GaN/n-GaAs

2018 ◽  
Vol 18 (06) ◽  
pp. 1850039
Author(s):  
Abderrezzaq Ziane ◽  
Mohamed Amrani ◽  
Abdelaziz Rabehi ◽  
Zineb Benamara
Keyword(s):  
Schottky Diode ◽  
High Frequency ◽  
High Vacuum ◽  
Low Frequency ◽  
Interface State ◽  
Interface States ◽  
State Density ◽  
Ultra High Vacuum ◽  
Active Nitrogen ◽  
Capacitance Voltage

Au/GaN/GaAs Schottky diode created by the nitridation of n-GaAs substrate which was exposed to a flow of active nitrogen created by a discharge source with high voltage in ultra-high vacuum with two different thicknesses of GaN layers (0.7[Formula: see text]nm and 2.2[Formula: see text]nm), the I–V and capacitance–voltage (C–V) characteristics of the Au/n-GaN/n-GaAs structures were studied for low- and high-frequency at room temperature. The measurements of I–V of the Au/n-GaN/n-GaAs Schottky diode were found to be strongly dependent on bias voltage and nitridation process. The electrical parameters are bound by the thickness of the GaN layer. The capacitance curves depict a behavior indicating the presence of interface state density, especially in the low frequency. The interface states density was calculated using the high- and low-frequency capacitance curves and it has been shown that the interface states density decreases with increasing of nitridation of the GaAs.

Electrical Properties of High-K LaLuO3 Gate Oxide for SOI MOSFETs

2011 ◽  
Vol 276 ◽  
pp. 87-93
Author(s):  
Y.Y. Gomeniuk ◽  
Y.V. Gomeniuk ◽  
A. Nazarov ◽  
P.K. Hurley ◽  
Karim Cherkaoui ◽  
...  
Keyword(s):  
Electrical Characterization ◽  
Gate Oxide ◽  
Interface State ◽  
Channel Length ◽  
State Density ◽  
Interface State Density ◽  
Mos Capacitors ◽  
Channel Mobility ◽  
Threshold Voltages

The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-κ LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO3/Si interface is presented and typical maxima of 1.2×1011 eV–1cm–2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 µm and 50 µm, respectively) are presented. The front channel mobility appeared to be 126 cm2V–1s–1 and 70 cm2V–1s–1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.

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