Device Application and Growth Mechanism for Hemispherical-Grained Si.

1991 ◽  
Vol 219 ◽  
Author(s):  
Hirohito Watanabe ◽  
Nahomi Aoto ◽  
Saburo Adachi ◽  
Takamaro Kikkawa
Keyword(s):  
Transition Temperature ◽  
Dielectric Film ◽  
Random Access ◽  
Chemical Vapor ◽  
Film Structure ◽  
Access Memory ◽  
Pressure Chemical ◽  
Amorphous Si ◽  
Si Films ◽  
Crystalline Growth

ABSTRACTA polycrystalline-silicon surface with hemispherical-grain (HSG) is deposited by low-pressure chemical vapor deposition at the transition temperature of the film structure from amorphous to polycrystalline. The surface area of the HSG-Si film is about twice as large as Si films deposited at other temperatures. It is found that the HSG-Si is not formed during deposition, but formed during annealing of amorphous Si surface after deposition. At the annealing temperature which is maintained to be the transition temperature, HSG-Si is formed by the nuclei generation on the amorphous-Si surface and the outward crystalline growth of grains dixough migration of surface Si atoms. By applying the HSG-Si film as the storage electrode for a 64Mbit dynamic random access memory (DRAM) stacked-capacitor with a SiO2Si3N4 dielectric film, twice the capacitance is obtained. The increase in the capacitance makes it possible to reduce the DRAM cell area, even by using a relatively thick dielectric film for higher reliability. Consequently, the HSG-Si technique is applicable to the fabrication process for 64Mbit and larger DRAMs.

Stress Effects on Nanocrystal Formation by Ni-Induced Crystallization of Amorphous Si

2003 ◽  
Vol 762 ◽  
Author(s):  
Yaocheng Liu ◽  
Michael D. Deal ◽  
Mahmooda Sultana ◽  
James D. Plummer
Keyword(s):  
Low Temperature ◽  
Integrated Circuits ◽  
Crystallization Rate ◽  
Chemical Vapor ◽  
Sputtering Deposition ◽  
Si Nanocrystals ◽  
Pressure Chemical ◽  
Amorphous Si ◽  
Si Films ◽  
Induced Crystallization

AbstractMetal-induced crystallization (MIC) of amorphous Si is gaining increased interest because of its potential use for low-temperature fabrication of integrated circuits. In this work, the MIC technique was used to make Si nanocrystals and the effects of stress on the crystallization were studied. Amorphous Si films were deposited onto the Si substrate with thermal oxides on top by low-pressure chemical vapor deposition (LPCVD) and then patterned into nanoscale pillars by electron beam lithography and reactive ion etching. A conformal low-temperature oxide (LTO) layer was deposited to cover the pillars, followed by an anisotropic etch back to form a spacer, leaving only the top surface of the pillars exposed to the 5 nm Ni sputtering deposition afterwards. An HF dip was used to partially remove the LTO spacers on the pillars, leading to different LTO thicknesses on different samples. These samples were then annealed to crystallize the amorphous Si pillars, forming Si nanocrystals. Transmission electron microscope (TEM) observations after anneal found a clear dependence of the crystallization rate on the pillar size as well as the LTO thickness. The crystallization rate was lower for pillars with thicker LTO spacers, while for the same LTO thickness the crystallization rate was lower for pillars with narrower width. A model based on the stress in the pillars is proposed to explain this dependence. This model suggests some methods to control the nickel-induced crystallization process and achieve higher quality Si nanocrystals.

Thin-Film Amorphous Silicon Dynodes for Electron Multiplication

1990 ◽  
Vol 192 ◽  
Author(s):  
G.W. Tasker ◽  
J.R. Horton ◽  
J.J. Fijol
Keyword(s):  
Thin Film ◽  
Chemical Vapor ◽  
Lead Silicate ◽  
Electron Multiplication ◽  
Microchannel Plates ◽  
Pressure Chemical ◽  
Amorphous Si ◽  
Si Films ◽  
New Applications ◽  
New Generation

ABSTRACTThe design and fabrication of novel, thin-film continuous dynodes for a new generation of channel electron multipliers (CEMs) and microchannel plates (MCPs) are described. In particular, we demonstrate the feasibility of forming such dynodes by low pressure chemical vapor deposition (LPCVD) of amorphous Si films in capillary channels of macroscopic to microscopic dimensions. Finally, we discuss potential performance advantages of thin-film dynodes over conventional reduced lead silicate glass dynodes for CEMs and MCPs and implications for new applications.

Reversible switching in bicontinuous structure for phase change random access memory application

Nanoscale ◽  
2021 ◽  
Vol 13 (8) ◽  
pp. 4678-4684
Author(s):  
Yan Cheng ◽  
Yonghui Zheng ◽  
Zhitang Song
Keyword(s):  
Phase Change ◽  
Random Access ◽  
Random Access Memory ◽  
Access Memory ◽  
Bicontinuous Structure ◽  
Amorphous Si

A 3D nano-bicontinuous structure consisting of a reversible Sb2Te3 phase and amorphous Si phase is visualized. The amorphous Si frame is stable and the Sb2Te3 nano areas switch between the a- and f-structure.

Investigation of Microwave Annealing on Resistive Random Access Memory Device with Atmospheric Pressure Plasma Enhanced Chemical Vapor Deposition Deposited IGZO Layer

2020 ◽  
Vol 20 (7) ◽  
pp. 4244-4247 ◽  
Author(s):  
Chien-Hung Wu ◽  
Song-Nian Kuo ◽  
Kow-Ming Chang ◽  
Yi-Ming Chen ◽  
Yu-Xin Zhang ◽  
...  
Keyword(s):  
Flash Memory ◽  
Random Access ◽  
Atmospheric Pressure Plasma ◽  
Chemical Vapor ◽  
Random Access Memory ◽  
Resistive Random Access Memory ◽  
Electrical Characteristics ◽  
Access Memory ◽  
Microwave Annealing ◽  
Operation Speed

Non-volatile memory (NVM) is essential in almost every consumer electronic products. The most prevalent NVM used nowadays is flash memory (Meena, J.S., et al., 2014. Overview of emerging nonvolatile memory technologies. Nanoscale Res. Letters, 9(1), p.526). However, some bottlenecks of flash memory have been identified, such as high operation voltage, low operation speed, and poor retention time. Resistive random access memory (RRAM) is considered to be the most promising one to become the next generation NVM device since its simple structure, fast program/erase speed, and low power consumption. In this experiment, the RRAM device is fabricated, and its IGZO (memory) layer is deposited with AP-PECVD technique which can reduce cost of the process. Microwave annealing (MWA) is used to enhance electrical characteristics of the RRAM device (Fuh, C.S., et al., 2011. Role of environmental and annealing conditions on the passivation-free In–Ga– Zn–O TFT. Thin Solid Films, 520, pp.1489–1494). Experiment results show that with appropriate MWA treatment, the IGZO RRAM device exhibits better electrical characteristics under bipolar operation, all forming/set/reset voltage for RRAM device is simultaneously lowered.

Polycrystalline Silicon Films Formed by Solid-Phase Crystallization of Amorphous Silicon: the Substrate Effects on Crystallization Kinetics and Mechanism

1996 ◽  
Vol 424 ◽  
Author(s):  
Y.-H. Song ◽  
S.-Y. Kang ◽  
K. I. Cho ◽  
H. J. Yoo ◽  
J. H. Kim ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
Solid Phase ◽  
Chemical Vapor ◽  
Solid Phase Crystallization ◽  
Substrate Effects ◽  
Random Nucleation ◽  
Pressure Chemical ◽  
Si Films ◽  
Polycrystalline Silicon Films ◽  
Induced Crystallization

AbstractThe substrate effects on the solid-phase crystallization of amorphous silicon (a-Si) have been extensively investigated. The a-Si films were prepared on two kinds of substrates, a thermally oxidized Si wafer (SiO2/Si) and a quartz, by low-pressure chemical vapor deposition (LPCVD) using Si2H6 gas at 470 °C and annealed at 600 °C in an N2 ambient for crystallization. The analysis using XRD and Raman scattering shows that crystalline nuclei are faster formed on the SiO2/Si than on the quartz, and the time needed for the complete crystallization of a-Si films on the SiO2/Si is greatly reduced to 8 h from ˜15 h on the quartz. In this study, it was first observed that crystallization in the a-Si deposited on the SiO2/Si starts from the interface between the a-Si film and the thermal oxide of the substrate, called interface-induced crystallization, while random nucleation process dominates on the quartz. The very smooth surface of the SiO2/Si substrate is responsible for the observed interface-induced crystallization of a-Si films.

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