A New Device Model of Amorphous Silicon Thin-Film Transistor for Circuit Simulation

1991 ◽  
Vol 219 ◽  
Author(s):  
Hong S. Choi ◽  
Jin S. Park ◽  
Chang H. Oh ◽  
In S. Joo ◽  
Yong S. Kim ◽  
...  
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Analytical Model ◽  
Circuit Simulation ◽  
Thin Film Transistor ◽  
Drain Current ◽  
Channel Length ◽  
Silicon Thin Film ◽  
New Device ◽  
Circuit Simulator

ABSTRACTWe present a new analytical model of amorphous silicon thin-film transistor (a-Si TFT) suitable for circuit simulators such as SPICE. The effects of localized gap state distributions of a-Si as well as temperatures on the a-Si TFT performances have been fully considered in the presented model. The parameters used in SPICE, such as transconductance, channel-length modulation, and power factor of source-drain current, are evaluated from the measured current-voltage and capacitance-voltage characteristics by employing the proposed extraction method. It has been found out that the analytical model is in good agreement with experimental data at both room temperature and elevated temperature and successfully implemented in a widely used circuit simulator.

Exploration of Amorphous Silicon Thin Film Transistor Degradation with Thermal Anneal

1993 ◽  
Vol 297 ◽  
Author(s):  
R.F. Kwasnick ◽  
G.E. Possin ◽  
W.L. Hill II
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Substrate Surface ◽  
Thin Film Transistor ◽  
Transfer Characteristic ◽  
Channel Length ◽  
Silicon Thin Film ◽  
Short Channel ◽  
Effective Mobility ◽  
Long Channel

We have measured the device characterisics of short and long channel inverted- staggered hydrogenated amorphous silicon thin film transistors (TFTs) with either Mo or Cr source/drain metal after annealing at temperatures from 225 C to 275 C. The TFT deposition temperature at the substrate surface was about 270 C. From the slope of the transfer characteristic an effective mobility is extracted. Devices with Mo source/drain metal exhibit an initial effective mobility increase at short times (within about 30 min), while those with Cr do not. At long times the mobility of all devices decreases. The mobility changes are greatest for short channel length devices because of contact effects. The channel length dependence of the behavior permits a separation of the device behavior into contact and intrinsic mobility components.

Development of Spice Models for Amorphous Silicon Thin-Film Transistors

1989 ◽  
Vol 149 ◽  
Author(s):  
M. Hack ◽  
J. G. Shaw ◽  
M. Shur
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Circuit Simulation ◽  
Analytic Model ◽  
Silicon Thin Film ◽  
Simulation Tools ◽  
New Device ◽  
Terminal Model ◽  
Analog And Digital Circuits

ABSTRACTIn this paper we describe a new analytic model for both the current-voltage and capacitance-voltage characteristics of amorphous-silicon thin-film transistors. This analytic model has been incorporated into a circuit simulation program (SPICE) to provide an accurate comprehensive three terminal model for amorphous-silicon thin-film transistors. We present results showing good agreement between circuit simulations based on this new device model and experimental data. The development of amorphous silicon SPICE simulation tools increases the design accuracy of advanced analog and digital circuits.

A New Model for Series Resistance of Amorphous Silicon Thin Film Transistor

1992 ◽  
Vol 258 ◽  
Author(s):  
Yong S. Kim ◽  
Jin S. Park ◽  
Seong K. Lee ◽  
Jung R. Hwang ◽  
Hong S. Choi ◽  
...  
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Series Resistance ◽  
Operating Temperature ◽  
Thin Film Transistor ◽  
Channel Length ◽  
Silicon Thin Film ◽  
Short Channel ◽  
New Model ◽  
Wide Range

ABSTRACTWe presents a new model for the series resistance of an amorphous silicon (a-Si) thin film transistor (TFT) with an inverted-staggered configuration, considering the current spreading under the source and the drain contacts as well as the space charge limited current. The calculated results of our model have been in good agreements with the measured data over a wide range of applied voltage, gate-to-source and gate-to-drain overlap length, channel length, and operating temperature. Our model shows that the relative contribution of the series resistances to the current-voltage (I-V) characteristics of the a-Si TFT in the linear regime is more significant at low drain and high gate voltages, for short channel and small overlap length, and at low operating temperature, which has been verified successfully by the experimental measurements.

Theory of Vertical Amorphous Silicon Thin-Film Transistors

1989 ◽  
Vol 149 ◽  
Author(s):  
J. G. Shaw ◽  
M. Hack
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistor ◽  
Channel Length ◽  
Large Area ◽  
Silicon Thin Film ◽  
Short Channel ◽  
Design And Optimization ◽  
Current Path ◽  
Output Characteristics

ABSTRACTWe describe a vertical amorphous silicon thin-film transistor which is easy to fabricate and has a very short channel length that is determined by deposition, not lithography. Our vertical TFTs are compatible with large-area processing techniques andd have suitable terminal characteristics for use in practical circuits. Unlike a conventional thin-film transistor, the current path is primarily parallel to the electric field created by an insulated gate electrode. A two-dimensional computer program is used to analyze these devices and guide their design and optimization. We show how to suppress excessive leakage currents and improve the saturation of the output characteristics by a novel current-blocking technique.

Amorphous-silicon thin film transistor with two-step exposure process

2000 ◽  
Author(s):  
Pi-Fu Chen ◽  
Jr-Hong Chen ◽  
Dou-I Chen ◽  
HsixgJu Sung ◽  
June-Wei Hwang ◽  
...  
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistor ◽  
Silicon Thin Film ◽  
Exposure Process

Hydrogenation Effect of Amorphous Silicon Thin Film Transistors by Atmospheric Pressure CVD

1993 ◽  
Vol 297 ◽  
Author(s):  
Byung Chul Ahn ◽  
Jeong Hyun Kim ◽  
Dong Gil Kim ◽  
Byeong Yeon Moon ◽  
Kwang Nam Kim ◽  
...  
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Atmospheric Pressure ◽  
Thin Film Transistors ◽  
Field Effect ◽  
Low Cost ◽  
Thin Film Transistor ◽  
Field Effect Mobility ◽  
Silicon Thin Film ◽  
Hydrogenation Effect

The hydrogenation effect was studied in the fabrication of amorphous silicon thin film transistor using APCVD technique. The inverse staggered type a-Si TFTs were fabricated with the deposited a-Si and SiO2 films by the atmospheric pressure (AP) CVD. The field effect mobility of the fabricated a-Si TFT is 0.79 cm2/Vs and threshold voltage is 5.4V after post hydrogenation. These results can be applied to make low cost a-Si TFT array using an in-line APCVD system.

A Center-Offset Polycrystalline-Silicon Thin-Film Transistor With ${\rm n}^{+}$ Amorphous-Silicon Contacts

2009 ◽  
Vol 30 (1) ◽  
pp. 36-38 ◽  
Author(s):  
J. H. Oh ◽  
D. H. Kang ◽  
W. H. Park ◽  
J. Jang ◽  
Y. J. Chang ◽  
...  
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Polycrystalline Silicon ◽  
Thin Film Transistor ◽  
Silicon Thin Film

Study on Light Induced Leakage Current Related to Amorphous Silicon TFT Design

2007 ◽  
Vol 124-126 ◽  
pp. 259-262
Author(s):  
Jae Hong Jeon ◽  
Kang Woong Lee
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Leakage Current ◽  
Thin Film Transistor ◽  
Silicon Layer ◽  
Gate Electrode ◽  
Silicon Thin Film ◽  
Pattern Design ◽  
Conventional Design ◽  
The One

We investigated the effect of amorphous silicon pattern design regarding to light induced leakage current in amorphous silicon thin film transistor. In addition to conventional design, where amorphous silicon layer is protruding outside the gate electrode, we designed and fabricated amorphous silicon thin film transistors in another two types of bottom gated structure. The one is that the amorphous silicon layer is located completely inside the gate electrode and the other is that the amorphous silicon layer is protruding outside the gate electrode but covered completely by the source and drain electrode. Measurement of the light induced leakage current caused by backlight revealed that the design where the amorphous silicon is located inside the gate electrode was the most effective however the last design was also effective in reducing the leakage current about one order lower than that of the conventional design.

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