Development of Spice Models for Amorphous Silicon Thin-Film Transistors

1989 ◽  
Vol 149 ◽  
Author(s):  
M. Hack ◽  
J. G. Shaw ◽  
M. Shur
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Circuit Simulation ◽  
Analytic Model ◽  
Silicon Thin Film ◽  
Simulation Tools ◽  
New Device ◽  
Terminal Model ◽  
Analog And Digital Circuits

ABSTRACTIn this paper we describe a new analytic model for both the current-voltage and capacitance-voltage characteristics of amorphous-silicon thin-film transistors. This analytic model has been incorporated into a circuit simulation program (SPICE) to provide an accurate comprehensive three terminal model for amorphous-silicon thin-film transistors. We present results showing good agreement between circuit simulations based on this new device model and experimental data. The development of amorphous silicon SPICE simulation tools increases the design accuracy of advanced analog and digital circuits.

A new analytic model for amorphous silicon thin‐film transistors

1989 ◽  
Vol 66 (7) ◽  
pp. 3371-3380 ◽  
Author(s):  
Michael Shur ◽  
Michael Hack ◽  
John G. Shaw
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Analytic Model ◽  
Silicon Thin Film

A New Device Model of Amorphous Silicon Thin-Film Transistor for Circuit Simulation

1991 ◽  
Vol 219 ◽  
Author(s):  
Hong S. Choi ◽  
Jin S. Park ◽  
Chang H. Oh ◽  
In S. Joo ◽  
Yong S. Kim ◽  
...  
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Analytical Model ◽  
Circuit Simulation ◽  
Thin Film Transistor ◽  
Drain Current ◽  
Channel Length ◽  
Silicon Thin Film ◽  
New Device ◽  
Circuit Simulator

ABSTRACTWe present a new analytical model of amorphous silicon thin-film transistor (a-Si TFT) suitable for circuit simulators such as SPICE. The effects of localized gap state distributions of a-Si as well as temperatures on the a-Si TFT performances have been fully considered in the presented model. The parameters used in SPICE, such as transconductance, channel-length modulation, and power factor of source-drain current, are evaluated from the measured current-voltage and capacitance-voltage characteristics by employing the proposed extraction method. It has been found out that the analytical model is in good agreement with experimental data at both room temperature and elevated temperature and successfully implemented in a widely used circuit simulator.

The Instability Characteristics of Amorphous Silicon Thin Film Transistors with Various Interfacial and Bulk Defect States

1997 ◽  
Vol 36 (Part 1, No. 10) ◽  
pp. 6226-6229 ◽  
Author(s):  
Huang-Chung Cheng ◽  
Jun-Wei Tsai ◽  
Chun-Yao Huang ◽  
Fang-Chen Luo ◽  
Hsing-Chien Tuan
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Defect States ◽  
Silicon Thin Film

Hot-Wire Deposited Amorphous Silicon Thin-Film Transistors

1996 ◽  
Vol 424 ◽  
Author(s):  
R. E. I. Schropp ◽  
K. F. Feenstra ◽  
C. H. M. Van Der Werf ◽  
J. Holleman ◽  
H. Meiling
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Current Crowding ◽  
Hot Wire ◽  
Saturation Regime ◽  
Silicon Thin Film ◽  
Order Of Magnitude

AbstractWe present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

Low frequency noise in amorphous silicon thin film transistors with SiNx gate dielectric

2009 ◽  
Vol 105 (12) ◽  
pp. 124504 ◽  
Author(s):  
S. L. Rumyantsev ◽  
Sung Hun Jin ◽  
M. S. Shur ◽  
Mun-Soo Park
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Low Frequency ◽  
Frequency Noise ◽  
Low Frequency Noise ◽  
Silicon Thin Film

Effects of the Deposition Sequence on Amorphous Silicon Thin-Film Transistors

1989 ◽  
Vol 28 (Part 1, No. 11) ◽  
pp. 2197-2200 ◽  
Author(s):  
Kouichi Hiranaka ◽  
Tetsuzo Yoshimura ◽  
Tadahisa Yamaguchi
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Silicon Thin Film
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