Si(100) Surface Preparation by In-Situ or in-Vacuo Exposure to Remotely Plasma-Generated Atomic Hydrogen: Applications to Deposited SiO2 and Epitaxial Growth of Si

1990 ◽  
Vol 202 ◽  
Author(s):  
T. Yasuda ◽  
Y. Ma ◽  
S. Habermehl ◽  
S. S. Kim ◽  
G. Lucovsky ◽  
...  

ABSTRACTThis paper addresses the in-situ/in-vacuo preparation of Si (100) substrates by hydrogen plasma cleaning prior to low temperature deposition of SiO2, or epitaxial growth of Si or Ge. The paper emphasizes the effectiveness of this type of substrate surface preparation following ex-situ wet-cleaning procedures that include: i) conventional RCA cleans; ii) modified RCA cleans, which incorporate exposure of the Si substrate to ozone, O3; and iii) ozone exposure, with all of these terminated by the removal of sacrificial oxides by dilute HF. We conclude: i) all ex-situ surface cleaning of Si (100) substrates leaves behind sub-monolayer oxygen and carbon surface contamination; ii) that virtually all of the carbon can be removed by exposure of the Si surface to atomic hydrogen at a temperature of <300°C; and iii) that a necessary condition for: (a) the formation of Si/SiO2 interfaces with low defect densities, Dit<l−3×1010cm−2-eV−1, and (b) the growth of epitaxial films of Si; is that the processed Si surface exhibit a 2×1 reconstruction, as detected by LEED or RHEED, following the exposure to atomic hydrogen.

1992 ◽  
Vol 259 ◽  
Author(s):  
S. Banerjee ◽  
A. Tasch ◽  
T. Hsu ◽  
R. Qian ◽  
D. Kinosky ◽  
...  

ABSTRACTRemote Plasma-enhanced Chemical Vapor Deposition (RPCVD), which involves nonthermal, remote plasma excitation of precursors, has been demonstrated to be a novel and attractive technique for low temperature (150-450C) Si and Sil-xGex epitaxy for applications in Si ULSI and novel Si heterostructure devices which require compact doping profiles and/or heterointerfaces. An in situ low temperature remote hydrogen plasma clean in the Ultra-High Vacuum (UHV) deposition chamber in order to achieve a chemically passive, hydrogenated Si surface with minimal O, C and N contamination, is a critical component of the process. The ex situ wet chemical cleaning consists of ultrasonic degreasing and a modified RCA clean, followed by a final dilute HF dip. The in situ clean is achieved by remote plasma excited H, where H introduced through the plasma column is r-f excited such that the plasma glow does not engulf the wafer. In situ AES analysis shows that the remote H plasma clean results in very substantial reduction of the C, O and N contamination on the Si surface. We believe that the H plasma produces atomic H which, in turn, produces a reducing environment and has a slight etching effect on Si and SiO2 by converting them to volatile byproducts. TEM analysis of the wafers subjected to this clean indicate that defect-free surfaces with dislocation loop densities below TEM detection limits of 105 /cm2 are achievable. Corroborating evidence of achieving an atomically clean, smooth Si surface by remote H plasma clean as obtained from in situ RHEED analysis will also be presented. After in situ H cleaning at low pressures (45 mTorr), typically for 30 min. at a substrate temperature of 310 C, we observe both stronger integral order streaks compared to the as-loaded sample and the appearance of less intense half-order lines indicative of a (2 × 1) reconstruction pattern, indicating a monohydride termination. A (3 × 1) reconstruction pattern is observed upon H plasma clean at lower temperatures (250 C), which can be attributed to an alternating monohydride and dihydride termination. Results of air exposure of hydrogenated Si surfaces by AES analysis indicate that the (3 × l) termination is chemically more inert towards readsorption of C and 0. Successful Si homoepitaxy and Si/Sil-xGex heteroepitaxy under a variety of surface cleaning conditions prove that by a combination of these cleaning techniques, and by exploiting the inertness of the H-passivated Si surface, very low defect density films with 0 and C levels as low as 1X1018 cm−3 and 5×1017 cm−3, respectively, can be achieved.


2014 ◽  
Vol 219 ◽  
pp. 47-51 ◽  
Author(s):  
Tyler Kent ◽  
Mary Edmonds ◽  
Ravi Droopad ◽  
Andrew C. Kummel

A major obstacle facing III-V semiconductor based metal oxide semiconductor field effect transistors (MOSFETs) is the large density of trap states that exist at the semiconductor/oxide interface.[1] These trap states can pin the Fermi level preventing the MOSFET from acting as a switch in logic devices. Several sources of Fermi level pinning have been proposed including oxidation of the III-V substrate.[2, 3] In order to minimize the presence of III-V oxides it is crucial to employ either an ex-situ etch or to use an in-situ method such as atomic hydrogen cleaning.[4, 5] Although atomic H cleaning of III-V surfaces is well known, it has never been demonstrated on InGaAs (110) crystallographic faces. Furthermore, tri-gate field effect transistors (finFETs) have recently been employed in commercially available logic chips.[6] This unique device architecture allows for a reduction in short channel effects, minimization of the subthreshold swing, and a higher transconductance.[7] The InGaAs (110) surface would be the sidewalls of a vertically aligned (001) based finFETs.[8] Therefore, it is essential to find an in-situ method to efficiently remove any oxides or contamination from the (110) surfaces that is also compatible with the (001) surface. In this study, STM was employed to determine if atomic hydrogen can be used to remove the native oxide from air exposed InGaAs (110) samples. A post clean anneal was used to restore the surface to molecular beam epitaxy (MBE) levels of cleanliness.


2005 ◽  
Vol 475-479 ◽  
pp. 4067-4070
Author(s):  
Hyoun Woo Kim

We have demonstrated the preparation of the almost defect-free homoepitaxial layer and the defective layer, respectively, with and without applying the in-situ cleaning of the silicon substrate surface using electron cyclotron resonance hydrogen plasma. Secondary ion mass spectroscopy indicated that the interfacial oxygen and carbon concentrations, respectively, decreased and increased with the in-situ cleaning. We have investigated the effect of process parameters such as microwave power, d.c bias, and cleaning time, on the epitaxial growth, by evaluating the cross-sectional transmission electron microscopy images of the subsequently deposited Si homoepitaxial film.


1994 ◽  
Vol 342 ◽  
Author(s):  
Olivier Dulac ◽  
Yves I. Nissim

ABSTRACTPassivation of III-V semiconductor surfaces and especially the GaAs surface has been studied for over two decades without significant breakthrough. However, III-V device performances are still often limited by surface properties. In particular field effect behaviour in GaAs has been impossible to obtain due to the Fermi level pinning at the surface of this material. This paper presents an integrated sequence of low thermal budget processes to provide contamination control at the GaAs surface leading to very promising field effect on GaAs.In-situ surface cleaning using a Distributed Electron Cyclotron Resonance Microwave plasma (DECR MMP) has been integrated with a thin dielectric film deposition facility using light assisted CVD technics. Photoluminescence results carried out on GaAs surfaces have demonstrated that exposure to a hydrogen plasma induces lower recombination rates on these surfaces. Bulk diffusion of hydrogen during this process can be controlled and eliminated using an integrated Rapid Thermal Annealing (RTA). Finally, in-situ encapsulation by a dielectric allows one to stabilize the electronic properties of the surface for passivation applications. A silicon nitride film deposited by a direct UV photolysis deposition process has been developed for this study and is presented here.


1991 ◽  
Vol 235 ◽  
Author(s):  
Yung-Jen Lin ◽  
Ming-Deng Shieh ◽  
Chiapying Lee ◽  
Tri-Rung Yew

ABSTRACTSilicon epitaxial growth on silicon wafers were investigated by using plasma enhanced chemical vapor deposition from SiH4/He/H2. The epitaxial layers were growm at temperatures of 350°C or lower. The base pressure of the chamber was greater than 2 × 10−5 Torr. Prior to epitaxial growth, the wafer was in-situ cleaned by H2 baking for 30 min. The epi/substrate interface and epitaxial layers were observed by cross-sectional transmission electron microscopy (XTEM). Finally, the influence of the ex-situ and in-situ cleaning processes on the qualities of the interface and epitaxial layers was discussed in detail.


2003 ◽  
Vol 786 ◽  
Author(s):  
B.P. Gila ◽  
B. Luo ◽  
J. Kim ◽  
R. Mehandru ◽  
J.R. LaRoche ◽  
...  

ABSTRACTThe study of the effects of substrate surface preparation of GaN, both in-situ and ex-situ and the subsequent deposition of dielectric materials is necessary to create a viable GaN FET technology. Surface preparation techniques have been explored using RHEED, AES, SIMS and C-V measurements to produce films of low interface trap density, 1–2E11 eV−1cm−2. A similar study of the as-fabricated HEMT surface was carried out to create a cleaning procedure prior to dielectric passivation. Dielectric films of Sc2O3 and MgO were deposited via gas-source MBE. Post-deposition materials characterization included AES, TEM, XRR and XPS, as well as gate pulse and isolation current measurements for the passivated HEMT devices. From this study, the relationship between the interface structure and chemistry and the quality of the oxide/nitride electrical interface has been determined. The resulting process has led to the near elimination of the current collapse phenomenon. In addition, the resulting oxide/nitride interface quality has allowed for the first demonstration of inversion in GaN.


1991 ◽  
Vol 236 ◽  
Author(s):  
Yung-Jen Lin ◽  
Ming-Deng Shieh ◽  
Chiapying Lee ◽  
Tri-Rung Yew

AbstractSilicon epitaxial growth on silicon wafers were investigated by using plasma enhanced chemical vapor deposition from SiH4/He/H2. The epitaxial layers were growm at temperatures of 350°C or lower. The base pressure of the chamber was greater than 2 × 10−5 Torr. Prior to epitaxial growth, the wafer was in-situ cleaned by H2 baking for 30 min. The epi/substrate interface and epitaxial layers were observed by cross-sectional transmission electron microscopy (XTEM). Finally, the influence of the ex-situ and in-situ cleaning processes on the qualities of the interface and epitaxial layers was discussed in detail.


1987 ◽  
Vol 91 ◽  
Author(s):  
J.-M. Baribeau ◽  
D.C. Houghton ◽  
P. MaignÉ ◽  
W.T. Moore ◽  
R.L.S. Devine ◽  
...  

ABSTRACTA UHV MBE apparatus in which the deposition of both group IV and group III-V components is possible without breaking vacuum has been utilized to compare the growth of GaAs epilayers on non-polar Si(100) and Ge coated Si(100) substrates. In addition, a comparison of GaAs epilayers grown on substrates cleaned by ex-situ techniques and on substrates given all UHV in-situ surface preparation was made. Defect reduction by the incorporation of strained-layer superlattice dislocation filters and by post-growth rapid thermal anneal (RTA) thermal cycles was also investigated. Optical and material properties comparable to MBE grown GaAs/GaAs were obtained for GaAs grown on Ge coated Si(100) substrates.


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