Effect of Gate Dielectric on Performance of Polysilicon thin Film Transistors

1990 ◽  
Vol 182 ◽  
Author(s):  
Miltiadis K. Hatalis ◽  
Ji-Ho Kung ◽  
Jerzy Kanicki ◽  
Arthur A. Bright
Keyword(s):  
Thin Film ◽  
Silicon Nitride ◽  
Silicon Dioxide ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Gate Bias ◽  
Effective Electron ◽  
Bias Stress ◽  
Gate Bias Stress

AbstractThe effect of gate dielectric on the electrical characteristics of n-channel polysilicon thin film transistors was investigated. The following insulators were studied: silicon dioxide grown by wet oxidation, silicon dioxide deposited by plasma enhanced chemical vapor deposition (PECVD) and nitrogen-rich silicon nitride deposited by PECVD. It was observed that the effective electron mobility in TFTs having a deposited dielectric, either silicon nitride or silicon dioxide was higher than that measured in devices with grown silicon dioxide. The TFT leakage current was found to be lowest in devices with PECVD silicon nitride. Devices with deposited dielectrics did not degrade after a positive gate bias stress. However, reduction of the threshold voltage was observed in devices with PECVD silicon nitride, when they were subjected to a negative gate bias stress.

Performance of Polycrystalline Silicon Thin Film Transistors with Double Layer Gate Dielectric

1992 ◽  
Vol 284 ◽  
Author(s):  
Ji-Ho Kung ◽  
Miltiadis K. Hatalis ◽  
Jerzy Kanicki
Keyword(s):  
Thin Film ◽  
Silicon Nitride ◽  
Silicon Dioxide ◽  
Double Layer ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Nitride Layer ◽  
Silicon Thin Film ◽  
Bias Stress ◽  
Effective Carrier

ABSTRACTThe electrical characteristics of n- and p-channel poly-Si thin film transistors having a double layer gate dielectric structure are reported. The gate dielectric consists of a silicon dioxide layer and a nitrogen-rich silicon nitride layer, both deposited by PECVD at low temperatures (≥400° C). When the silicon nitride was in contact with the poly-Si film, the effective carrier mobility (μeff), threshold voltage (Vth and subthreshold swing (St) for n-channel devices were 36 cm2/Vsec, -1.8 V and 1.65 V/decade, respectively, while for p-channel devices were 6 cm2/Vsec, -37 and 2.47 V/decade, respectively. These devices were not stable under negative gate bias stress, due to the injection of holes into the silicon nitride. When silicon dioxide was in contact with the poly-Si film, the μeff, Vth and St for n-channel devices were 26 cm2/Vsec, 3 V and 1.63 V/decade, respectively, while for p-channel devices were 10 cm2/Vsec, -22 V and 1.52 V/decade, respectively. These devices were stable under d.c. bias stress.

Degradation behavior and degradation mechanism of bridged-grain polycrystalline silicon thin film transistors under AC gate bias stress

2017 ◽  
Vol 32 (2) ◽  
pp. 91-96
Author(s):  
张猛 ZHANG Meng ◽  
夏之荷 XIA Zhi-he ◽  
周玮 ZHOU Wei ◽  
陈荣盛 CHEN Rong-sheng ◽  
王文 WONG Man ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Degradation Mechanism ◽  
Gate Bias ◽  
Degradation Behavior ◽  
Silicon Thin Film ◽  
Bias Stress ◽  
Gate Bias Stress

scholarly journals Influence of Passivation Layers on Positive Gate Bias-Stress Stability of Amorphous InGaZnO Thin-Film Transistors

Micromachines ◽  
2018 ◽  
Vol 9 (11) ◽  
pp. 603 ◽  
Author(s):  
Yan Zhou ◽  
Chengyuan Dong
Keyword(s):  
Thin Film ◽  
Layer Thickness ◽  
Thin Film Transistors ◽  
Characteristic Length ◽  
Ambient Atmosphere ◽  
Gate Bias ◽  
Threshold Voltage Shift ◽  
Bias Stress ◽  
Amorphous Ingazno ◽  
Gate Bias Stress

Passivation (PV) layers could effectively improve the positive gate bias-stress (PGBS) stability of amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs), whereas the related physical mechanism remains unclear. In this study, SiO2 or Al2O3 films with different thicknesses were used to passivate the a-IGZO TFTs, making the devices more stable during PGBS tests. With the increase in PV layer thickness, the PGBS stability of a-IGZO TFTs improved due to the stronger barrier effect of the PV layers. When the PV layer thickness was larger than the characteristic length, nearly no threshold voltage shift occurred, indicating that the ambient atmosphere effect rather than the charge trapping dominated the PGBS instability of a-IGZO TFTs in this study. The SiO2 PV layers showed a better improvement effect than the Al2O3 because the former had a smaller characteristic length (~5 nm) than that of the Al2O3 PV layers (~10 nm).

Sign in / Sign up

Export Citation Format

Share Document