Passivating Organic Coatings with Silicone Gels: The Correlation Between the Material Cure & its Electrical Reliability

1989 ◽  
Vol 154 ◽  
Author(s):  
C. P. Wong
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Protective Coatings ◽  
Low Cost ◽  
Chip Surface ◽  
Surface Protection ◽  
Cure Time ◽  
Silicone Gels ◽  
Cure Temperature ◽  
Electrical Reliability

AbstractSilicone gels are becoming some of the most accepted protective coatings for VLSI integrated circuits due to their excellent electrical, thermal, and soft gel-like nature and properties, as well as their ultra-purity and ability to protect IC devices against severe environments. Recent studies indicate that proper IC Chip surface protection with high performance silicone gels in low-cost, non-hermetic plastic packaging might well replace the conventional hermetic ceramic packaging. This paper describes the use of the soft silicone gels and coatings in IC devices. It also describes the correlation between the material cure temperature and cure time versus their adhesion and electrical reliability during 85°C, 85% RH and bias accelerating testing.

High Performance Silicone Gel as IC Device Chip Protection

1987 ◽  
Vol 108 ◽  
Author(s):  
C. P. Wong
Keyword(s):  
High Performance ◽  
High Reliability ◽  
Polymeric Materials ◽  
Special Focus ◽  
Chip Surface ◽  
Surface Protection ◽  
Plastic Packaging ◽  
Silicone Gel ◽  
Chip Size ◽  
Silicone Gels

ABSTRACTRecent advances in IC device encapsulants and polymeric materials have made high reliability VLSI plastic packaging a reality. High performance silicone gel possesses excellent electrical and physical properties for IC protection. With their intrinsic low modulus and soft gel-like nature, silicone gels have become very effective encapsulants for the delicate larger chip size and wire-bonded VLSI chips. Recent studies indicate that adequate IC chip surface protection with high performance silicone gels in plastic packaging could possibly replace conventional ceramic: hermetic packaging. This paper will review some potential IC encapsulants. Special focus will be placed on the high performance silicone gel, its chemistry, and its application as a VLSI device encapsulant.

Thin-film Micro-Batteries Based on Metal Nanoparticles

2012 ◽  
Vol 1440 ◽  
Author(s):  
Shuang Peng ◽  
Wenjun Du ◽  
Leela Rakesh ◽  
Axel Mellinger ◽  
Tolga Kaya
Keyword(s):  
Thin Film ◽  
Integrated Circuits ◽  
Metal Nanoparticles ◽  
High Performance ◽  
Low Voltage ◽  
Low Cost ◽  
Open Circuit ◽  
Energy Storage And Conversion ◽  
Battery Capacity ◽  
Zn Nanoparticles

ABSTRACTWe proposed the use of Copper (Cu) and Zinc (Zn) nanoparticles as the electrodes for thin-film microbatteries in the applications of micro-scale sensors. Compared to the widely used lithium-based batteries, Cu and Zn nanoparticles are less expensive, less prone to oxidation (thus involving simpler fabrication steps) and flammability, safe to use, and only requires very simple fabrication processes.Even though the voltage output is inherently smaller (∼1V) than conventional lithium-based batteries, it is sufficient for low-voltage Integrated Circuits (IC) technologies such as 130 nm and 90 nm channel length transistor processes.Commercial paper will be used as the separator to demonstrate the battery capacity. Paper that acts as the separator is slurry-casted with nanoparticles (30-40 nm in size) on both sides. The thickness of the metal nanoparticles-coated thin films and the paper separator are 1 μm and 100 μm, respectively.The electrodes were developed to achieve high conductivity (lower than 1 (Ω·cm)-1) with smooth surface, good adhesion, and flexibility. The metal nanoparticles will be formulated to slurry solutions for screen printing or ink-jet printing for the battery fabrication. For fabrication purposes, the slurries viscosity is approximately in the range of 10-12 cPs at the operating temperature, a surface tension between 28-33 dynes/cm. During the fabrication process including printing/coating and sintering, reductive environment is required to minimize the oxidation. AFM (Atomic Force Microscopy) and EDS (Energy Dispersive Spectroscopy) results will be employed to demonstrate the surface morphology as well as the percentages of metal oxides. Batteries will be tested with and without an ionic liquid for comparison. Humidity effects on the battery performance will also be discussed.Different geometries that are designed to make the batteries with higher voltage or charge will be proposed. Characterization results will include the open-circuit voltage, dielectric property, charging and discharging curve, capacitance and capacity, AFM of the surface test, EDS of the electrodes and the SEM (Scanning Electron microscopy) of the particles.Ourresearch suggest that conductive paper can be scalable and could make high-performance energy storage and conversion devices at low cost and would bring new opportunities for advanced applications.

scholarly journals Advances in Low Cost Silver-Containing Thick Film Conductors

1981 ◽  
Vol 9 (1) ◽  
pp. 67-85 ◽  
Author(s):  
Barry E. Taylor ◽  
John J. Felten ◽  
Samuel J. Horowitz ◽  
John R. Larry ◽  
Richard M. Rosenberg
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Thick Film ◽  
High Speed ◽  
High Performance ◽  
Low Cost ◽  
High Volume ◽  
Film Material ◽  
Advantages And Disadvantages ◽  
Thick Film Technology

Extensive use of thick film materials to manufacture resistor networks and hybrid integrated circuits has come about because of economic, processing and functional advantages over other technologies in the high volume production of miniaturized circuits. Inherent in the adoption of thick film technology for increasingly diverse applications has been the ability of thick film material suppliers to provide progressive performance improvements at lower cost concurrent with circuit manufacturer's needs. Since the first major commercial thick film adoption in the early sixties, when IBM adopted platinum gold conductors and palladium silver resistors in their 360 computers, rapid technological advances over the last decade have produced an increasing variety of hybrid circuits and networks. The wide adoption of thick film technology in all segments of the electronic industry has placed increasing demands on performance and processing latitude. This paper outlines the development of low cost silver-bearing conductors and describes the evolution of technology improvements to present day systems. The initial segment reviews the deficiencies of early Pd/Ag conductors, particularly solder leach resistance and degradation of soldered adhesion following high temperature storage, and focuses on the first Pd/Ag system which overcame these problems. Extension of this technology and subsequent improvements in both binders and vehicles to fulfill adhesion requirements to Al2O3substrates of varying chemistries and to meet demands for high speed printing are also described. The second segment gives an overview of the present understanding of thick film conductor composites from a mechanistic point of view. The various types of binder systems commonly employed in conductors are discussed in terms of how they effect a bond between the sintered metal and the substrate, and the advantages and disadvantages of each type. Metallurgical aspects of conductor/solder connections are considered and their effects on bond reliability following exposure to high temperature discussed. Rheological considerations of paste design are presented and related to printing performance. The final segment focuses on newer low cost, high performance material systems that have evolved over the past two years. The technologies of each system are reviewed in terms of metallurgy, binder and vehicle. Important functional properties are presented to illustrate cost/performance tradeoffs. Special emphasis is given to recently developed high Ag containing conductors which have outstanding soldered adhesion even after 1000 hours of storage at 150℃.

Metallization for Integrated Circuit Manufacturing

MRS Bulletin ◽  
1995 ◽  
Vol 20 (11) ◽  
pp. 33-37 ◽  
Author(s):  
R.V. Joshi ◽  
R.S. Blewer ◽  
S. Murarka
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
High Performance ◽  
Low Cost ◽  
Semiconductor Industry ◽  
Random Access ◽  
Circuit Performance ◽  
Integrated Circuit Manufacturing ◽  
The 1960S ◽  
Al Metallization

This issue of the MRS Bulletin focuses on current interconnect metallurgies practiced in the manufacturing of integrated circuits (ICs). The issue should serve as a reference for researchers, scientists, engineers, and those who are not familiar with the IC arena.Al-metallization requires special attention due to its wide usage in logic and memory circuits. Logic requirements drive technology toward improved circuit performance while memory improvements require high device and wiring densities. As the dynamic random access memory (DRAM) evolves from 64 Mbits to 256 Mbits, ultralarge-scale integrated (ULSI) wiring will decrease to below sub-0.3 μm in dimensions. Such circuits require robust, reliable back end of the line (BEOL) technology that meets high-performance, low-cost, stringent electromigration requirements. We feel that several of these emerging interconnect fabrication techniques have reached a sufficient level of maturity to warrant a reasonable exposition. We will concentrate on metallization systems in this issue, leaving a discussion of dielectrics for the future, due to space limitations.The semiconductor industry has relied on aluminum technology since the 1960s because it is a well-established, low-cost technology. Early improvements in the electromigration resistance of Al lines by the addition of Cu impurities after 1971 helped this metallurgy to endure further feature size reductions, without degradation of reliability. However, the relentless reduction in via and line size once again may bring into question the limitation of Al reliability. As a result, work on alternate low-resistivity and high-electromigration-resistant metals like Cu is continuing in parallel.

Simulation Techniques for Improving Fabrication Yield of RF-CMOS ICs

2012 ◽  
pp. 61-98 ◽  
Author(s):  
Amparo Herrera
Keyword(s):  
Integrated Circuits ◽  
High Performance ◽  
Low Cost ◽  
Simulation Models ◽  
Rf Circuits ◽  
Ease Of Use ◽  
Battery Life ◽  
Simulation Techniques ◽  
Microwave Monolithic Integrated Circuits ◽  
Reliable Design

One of the industry sectors with the largest revenue in the telecommunication field is the wireless communications field. Wireless operators compete for being the first to place their products in the market to obtain the highest revenues. Moreover, they try to offer products that fulfill the user demands in terms of price, battery life, and product quality. All these requirements must be also fulfilled by the designer of the MMIC (Microwave Monolithic Integrated Circuits) circuits that will be used in those wireless terminals, achieving a reliable design, with high performance, low cost, and if possible, in one or two foundry iterations so as to bring the product out to the market as soon as possible. Silicon based technologies are the lowest cost. The demand to use them is simply based on that fact, but their usage in these applications is limited by the ease of use for the designer, in particular, by the lack of adequate simulation models. These technologies don’t include some essential components for the design of RF circuits, which leads to measurement results quite different from those simulated. On the other hand, GaAs based technologies, more mature in the RF and microwave field, provide very accurate models, as well as additional tools to verify the design reliability (yield and sensitivity analysis), allowing good results often with only one foundry iteration. The deep study of the problems presented when designing Si-based RF circuits will convince the reader of the need to use special tools as electromagnetic simulation or coo simulation to prevent it. The chapter provides different simulation techniques that help the designer to obtain better designs with a lower cost, as foundry iterations are reduced.

Cure of Hydrogen Silsesquioxane for Intermetal Dielectric Applications

1997 ◽  
Vol 476 ◽  
Author(s):  
J.N. Bremme ◽  
Y. Liu ◽  
K.G. Gruszynski ◽  
F.C. Dall
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Dielectric Material ◽  
Structure And Properties ◽  
Hydrogen Silsesquioxane ◽  
Cure Time ◽  
Lower Temperature ◽  
Cure Temperature ◽  
Intermetal Dielectric ◽  
Temperature Time

AbstractCure is a significant process during back end of the line fabrication of integrated circuits with hydrogen silsesquioxane since it affects structure and properties of the spin on dielectric material. Reported herein is the effect of soak temperature, time, and oxygen concentration process parameters on structure and properties of hydrogen silsesquioxane. Results of the study emphasize the importance of an inert environment during the baseline recommended cure conditions of 400 °C for one hour in order to avoid oxidation and formation of polar silanol or water species. A 350 °C cure temperature is more robust to oxidation providing similar or improved properties. Shorter cure times result in similar structure and properties as the baseline cure which suggests that lower temperature and/or shorter cure time may provide value worth investigating by integrated circuit manufacturers.

scholarly journals TSV Technology and High-Energy Heavy Ions Radiation Impact Review

Electronics ◽  
2018 ◽  
Vol 7 (7) ◽  
pp. 112 ◽  
Author(s):  
Wenchao Tian ◽  
Tianran Ma ◽  
Xiaohan Liu
Keyword(s):  
Integrated Circuits ◽  
Research Methods ◽  
Heavy Ions ◽  
High Performance ◽  
Ion Irradiation ◽  
Low Cost ◽  
Three Dimensional ◽  
Heavy Ion ◽  
High Energy ◽  
Radiation Environment

Three-dimensional integrated circuits (3D IC) based on TSV (Through Silicon Via) technology is the latest packaging technology with the smallest size and quality. As a result, it can effectively reduce parasitic effects, improve work efficiency, reduce the power consumption of the chip, and so on. TSV-based silicon interposers have been applied in the ground environment. In order to meet the miniaturization, high performance and low-cost requirements of aerospace equipment, the adapter substrate is a better choice. However, the transfer substrate, as an important part of 3D integrated circuits, may accumulate charge due to heavy ion irradiation and further reduce the performance of the entire chip package in harsh space radiation environment or cause it to fail completely. Little research has been carried out until now. This article summarizes the research methods and conclusions of the research on silicon interposers and TSV technology in recent years, as well as the influence of high-energy heavy ions on semiconductor devices. Based on this, a series of research methods to study the effect of high-energy heavy ions on TSV and silicon adapter plates is proposed.

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