The Effects of Surface Treatments for Low Temperature Silicon Dioxide Deposition on Cadmium Telluride.

1988 ◽  
Vol 131 ◽  
Author(s):  
Seong S. Choi ◽  
S. S. Kim ◽  
D. V. Tsu ◽  
G. Lucovsky
Keyword(s):  
Low Temperature ◽  
Plasma Treatment ◽  
Cadmium Telluride ◽  
Chemical Vapor ◽  
High Energy ◽  
Native Oxide ◽  
Strong Adhesion ◽  
Cdte Substrate ◽  
Oxide Removal ◽  
Cdte Surface

ABSTRACTWe have successfully deposited thin films of SiO2 on a cadmium telluride substrate at low temperature (Ts =100°C–300°C) by remote plasma enhanced chemical vapor deposition (Remote PECVD). The native oxide on the CdTe substrate has been removed, prior to deposition by either chemical etching in methanol and 1% bromine, or by dissolution in deionized water. After removal of the native oxide, the CdTe was inserted into a UHV-compatible deposition chamber and a He+ plasma treatment was performed prior to deposition of an SiO2 film. This treatment promotes strong adhesion between the deposited SiO2 film and the CdTe surface. We find that the initial oxide removal process does not influence SiO2 adhesion. The effect of the He+ plasma treatment on the CdTe surface has been studied by Auger electron spectroscopy(AES), and Reflection high energy electron diffraction (RHEED).

Remote plasma treatment of Si surfaces: Enhanced nucleation in low-temperature chemical vapor deposition

2009 ◽  
Vol 95 (14) ◽  
pp. 144107 ◽  
Author(s):  
Navneet Kumar ◽  
Angel Yanguas-Gil ◽  
Scott R. Daly ◽  
Gregory S. Girolami ◽  
John R. Abelson
Keyword(s):  
Chemical Vapor Deposition ◽  
Low Temperature ◽  
Plasma Treatment ◽  
Vapor Deposition ◽  
Chemical Vapor ◽  
Remote Plasma

A Complementary Wafer Cleaning and Growth Process for Low Temperature, Defect Free, Selective Silicon Epitaxy

1992 ◽  
Vol 259 ◽  
Author(s):  
Jon T. Fitch ◽  
Dean J. Denning
Keyword(s):  
Steady State ◽  
Low Temperature ◽  
Growth Process ◽  
Process Integration ◽  
Native Oxide ◽  
Growth Processes ◽  
Silicon Epitaxy ◽  
Wafer Cleaning ◽  
Cvd Growth ◽  
Oxide Removal

ABSTRACTLow temperature (<850°C) defect free selective silicon epitaxy has been achieved with a conventional barrel type reactor (base pressure -10−4 Torr) using complementary cleaning and growth processes: a wet multi-step oxidizing clean, and a novel non-steady state CVD growth process. With this combination of cleaning and growth processes, it is shown that the need for a high temperature (950-1000°C) insitu native oxide removal step, which may be incompatible with advanced VLSI process integration, is eliminated.

scholarly journals Impact of the Deposition Temperature on the Structural and Electrical Properties of InN Films Grown on Self-Standing Diamond Substrates by Low-Temperature ECR-MOCVD

Coatings ◽  
2020 ◽  
Vol 10 (12) ◽  
pp. 1185
Author(s):  
Shuaijie Wang ◽  
Fuwen Qin ◽  
Yizhen Bai ◽  
Dong Zhang ◽  
Jingdan Zhang
Keyword(s):  
Electrical Properties ◽  
Low Temperature ◽  
Deposition Temperature ◽  
Electron Cyclotron Resonance ◽  
Chemical Vapor ◽  
Hall Effect Measurement ◽  
High Energy ◽  
Organic Chemical ◽  
Structural And Electrical Properties ◽  
Metal Organic

The progress of InN semiconductors is still in its infancy compared to GaN-based devices and materials. Herein, InN thin films were grown on self-standing diamond substrates using low-temperature electron cyclotron resonance plasma-enhanced metal organic chemical vapor deposition (ECR-PEMOCVD) with inert N2 used as a nitrogen source. The thermal conductivity of diamond substrates makes the as-grown InN films especially attractive for various optoelectronic applications. Structural and electrical properties which depend on deposition temperature were systematically investigated by reflection high-energy electron diffraction (RHEED), X-ray diffraction (XRD), scanning electron microscopy (SEM), atomic force microscopy (AFM), and Hall effect measurement. The results indicated that the quality and properties of InN films were significantly influenced by the deposition temperature, and InN films with highly c-axis preferential orientation and surface morphology were obtained at optimized temperatures of 400 °C. Moreover, their electrical properties with deposition temperature were studied, and their tendency was correlated with the dependence on micro- structure and morphology.

Selective Deposition of Silicon and Silicon-Germanium Alloys by Rapid Thermal Chemical Vapor Deposition

1996 ◽  
Vol 429 ◽  
Author(s):  
John M. Grant ◽  
Ming Ang ◽  
Lynn R. Allen
Keyword(s):  
Surface Roughness ◽  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Silicon Germanium ◽  
Chemical Vapor ◽  
Native Oxide ◽  
Initiation Time ◽  
Selective Deposition ◽  
Thermal Chemical Vapor Deposition ◽  
Oxide Removal

AbstractSelective deposition of SiGe alloys by rapid thermal deposition has been studied using a commercially available Rapid Thermal Chemical Vapor Deposition (RTCVD) cluster tool. The precursors used in this work were dichlorosilane and germane diluted in either hydrogen or argon. An initial characterization was performed to find the appropriate temperature and GeH4 flow ranges to deposit epitaxial layers with low surface roughness. For layers with higher germanium concentration lower deposition temperatures are required to minimize surface roughness. The effects of the dilutant gas on the deposition were examined. An H2 dilutant affects the deposition by consuming chlorine released by the SiCl2H2 and forming HCI. When Ar is used as the dilutant, more chlorine is available for other reactions that can result in etching of the silicon surface. Finally, the effects of pre-deposition treatment were determined. When compared to a wet HF dip, a gas/vapor phase HF/methanol native oxide removal treatment appears to increase the initiation time for the epitaxial deposition reaction. This is most likely due to increased fluorine termination of the surface. When a wet HF or HF/methanol native oxide removal is followed by a UV-Cl2 process, the deposition reaction initiation time is reduced. The UV-Cl2 process was also found to etch silicon through the native oxide.

scholarly journals Direct synthesis of graphene on silicon oxide by low temperature plasma enhanced chemical vapor deposition

Nanoscale ◽  
2018 ◽  
Vol 10 (26) ◽  
pp. 12779-12787 ◽  
Author(s):  
Roberto Muñoz ◽  
Lidia Martínez ◽  
Elena López-Elvira ◽  
Carmen Munuera ◽  
Yves Huttel ◽  
...  
Keyword(s):  
Low Temperature ◽  
Silicon Oxide ◽  
Direct Synthesis ◽  
Chemical Vapor ◽  
Native Oxide ◽  
Monolayer Graphene ◽  
Low Temperature Plasma ◽  
Temperature Plasma ◽  
Graphene Films ◽  
Free Growth

Direct, low temperature, catalyst-free and transfer-free growth of monolayer graphene films on silicon wafer with a native oxide.

scholarly journals A Phase Diagram for Morphology and Properties of Low Temperature Deposited Polycrystalline Silicon Grown by Hot-wire Chemical Vapor Deposition

2004 ◽  
Vol 808 ◽  
Author(s):  
Christine E. Richardson ◽  
Maribeth S. Mason ◽  
Harry A. Atwater
Keyword(s):  
Thin Film ◽  
Chemical Vapor Deposition ◽  
Low Temperature ◽  
Vapor Deposition ◽  
Polycrystalline Silicon ◽  
Crystalline Silicon ◽  
Solid Phase ◽  
Chemical Vapor ◽  
High Energy ◽  
Hot Wire

ABSTRACTThe fabrication of low temperature polycrystalline silicon with lifetimes close to single crystalline silicon, but with internal surface passivation similar to that observed in deposited microcrystalline silicon, is a promising direction for thin film polycrystalline silicon photovoltaics. To achieve this, large grains with passivated grain boundaries and intragranular defects are required. We investigate the low-temperature (250-550°C) epitaxial growth of thin silicon films by hot-wire chemical vapor deposition (HWCVD) on Si(100) substrates and large-grained polycrystalline silicon template layers formed by selective nucleation and solid phase epitaxy (SNSPE). Using reflection high energy electron diffraction (RHEED) and transmission electron microscopy (TEM), we have observed epitaxial, twinned epitaxial, mixed epitaxial/polycrystalline and polycrystalline phases in the 50 nm–15 μm thickness regime. HWCVD growth on Si(100) was performed using a mixture of diluted silane (4% in He) and hydrogen at a H2/SiH4 ratio of 50:1 at substrate temperatures from 300–475°C. We will discuss the relationship between the microstructure and photoconductive decay lifetimes of these undoped layers on Si(100) and SNSPE templates as well as their suitability for use in thin-film photovoltaic applications.

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