High-k dielectrics for hybrid floating gate memory applications

2012 ◽  
Vol 1430 ◽  
Author(s):  
J.G. Lisoni ◽  
L. Breuil ◽  
P. Blomme ◽  
J. Van Houdt
Keyword(s):  
Dielectric Constant ◽  
Metal Layer ◽  
Device Fabrication ◽  
Floating Gate ◽  
High K ◽  
Interface Characteristics ◽  
Floating Gate Memory ◽  
Memory Applications ◽  
Intermetal Dielectric ◽  
Metal Layers

ABSTRACTWe report on the materials issues involved in the hybrid floating gate (HFG) device fabrication, where the interpoly dielectric is replaced by an intermetal dielectric (IMD). Indeed, in HFG the dielectric is inserted in between two metal layers in a metal\dielectric\metal stack. The materials of choice were TiN as the metal layer and Al2O3 and HfO2 (and their combination) as IMD. The program/erase performance is discussed based on the dielectric constant and crystallinity of the IMD and the metal-IMD interface characteristics.

Well-ordered nanoparticle arrays for floating gate memory applications

2020 ◽  
Vol 31 (21) ◽  
pp. 215203
Author(s):  
Furkan Kuruoğlu ◽  
Murat Çalışkan ◽  
Merih Serin ◽  
Ayşe Erol
Keyword(s):  
Floating Gate ◽  
Nanoparticle Arrays ◽  
Floating Gate Memory ◽  
Memory Applications

Performance of Direct Tunneling Floating Gate Memory with Medium-κ Dielectrics for Embedded-Random-Access Memory Applications

2006 ◽  
Vol 45 (4B) ◽  
pp. 3170-3175
Author(s):  
Bogdan Govoreanu ◽  
Robin Degraeve ◽  
Thomas Kauerauf ◽  
Wim Magnus ◽  
Dirk Wellekens ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Floating Gate ◽  
Access Memory ◽  
Direct Tunneling ◽  
Floating Gate Memory ◽  
Memory Applications

CVD Growth and Passivation of W and TiN Nanocrystals for Non-volatile Memory Applications

2010 ◽  
Vol 1250 ◽  
Author(s):  
Guillaume Gay ◽  
Djamel Belhachemi ◽  
Jean-Philippe Colonna ◽  
Stéphane Minoret ◽  
Arnaud Beaurain ◽  
...  
Keyword(s):  
Silicon Nitride ◽  
Vapor Deposition ◽  
Chemical Vapor ◽  
Charge Trapping ◽  
Floating Gate ◽  
Chemical Vapor Deposition Growth ◽  
Floating Gate Memory ◽  
Non Volatile Memory ◽  
Cvd Growth ◽  
Memory Applications

AbstractIn this paper, we present CVD (Chemical Vapor Deposition) growth and passivation of tungsten (W) and titanium nitride (TiN) nanocrystals (NCs) on silicon dioxide and silicon nitride for use as charge trapping layer in floating gate memory devices. NCs are deposited in an 8 inches industrial CVD Centura tool. W and TiN are chosen for being compatible with MOSFET memory fabrication process. For protecting NCs from oxidation, a silicon shell is selectively deposited on them. Moreover, for a better passivation, TiN NCs are encapsulated in silicon nitride (Si3N4) in order to get rid of oxidation issues. After high temperature annealing (1050°C under N2 during 1 minute) XPS measurements point out that NCs are still metallic, which makes them good candidates for being used as charge trapping layer in floating gate memories.

Performance Enhancement of Metal Floating Gate Memory by Using a Bandgap Engineered High-k Tunneling Barrier

2016 ◽  
Vol 72 (2) ◽  
pp. 51-55
Author(s):  
D. Jiang ◽  
L. Jin ◽  
Z. Xia ◽  
G. Chen ◽  
X. Zou ◽  
...  
Keyword(s):  
Performance Enhancement ◽  
Floating Gate ◽  
Tunneling Barrier ◽  
High K ◽  
Floating Gate Memory
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