Mechanical and Structural Property Changes of Monolithic SiC and Advanced SiC/SiC Composites due to Low Temperature He+-Ion Irradiation and Post-Irradiation High Temperature Annealing

2004 ◽  
Vol 1 (4) ◽  
pp. 11335
Author(s):  
S Nogami ◽  
S Miwa ◽  
A Hasegawa ◽  
K Abe
Keyword(s):  
High Temperature ◽  
Low Temperature ◽  
Structural Property ◽  
Ion Irradiation ◽  
High Temperature Annealing ◽  
Post Irradiation ◽  
Sic Composites ◽  
Property Changes

High-temperature desulfurization using zinc ferrite: solid structural property changes

1989 ◽  
Vol 44 (2) ◽  
pp. 215-224 ◽  
Author(s):  
L.N. Sa ◽  
G.D. Focht ◽  
P.V. Ranade ◽  
D.P. Harrison
Keyword(s):  
High Temperature ◽  
Structural Property ◽  
Zinc Ferrite ◽  
Property Changes

Effect of Low-Temperature Recovery Treatments on Subsequent Recrystallization in Al-2.5%Mg

2007 ◽  
Vol 550 ◽  
pp. 381-386 ◽  
Author(s):  
B. Decreus ◽  
Hatem S. Zurob ◽  
John Dunlop ◽  
Yves Bréchet
Keyword(s):  
High Temperature ◽  
Low Temperature ◽  
Hardness Measurement ◽  
Optical Metallography ◽  
Mg Alloys ◽  
High Temperature Annealing ◽  
Recrystallization Kinetics ◽  
Temperature Recovery ◽  
Kinetics Of ◽  
And Calorimetry

The effect of low temperature recovery treatments on the recrystallization kinetics during subsequent high temperature annealing was investigated in three Al-2.5%Mg alloys with various Fe additions. Recovery treatments were carried out at 190oC for times ranging from 0.25 to 65 hrs. Recrystallization treatments were carried out at 280oC. The kinetics of recrystallization was followed using the techniques of hardness measurement, optical metallography and calorimetry.

The Template Technique Applied to Epitaxial Growth of CrSi2 on Silicon (111)

1993 ◽  
Vol 317 ◽  
Author(s):  
John E. Manan ◽  
Robert G. Long ◽  
André Vantomme ◽  
Marc-A. Nicolet
Keyword(s):  
Thin Films ◽  
High Temperature ◽  
Low Temperature ◽  
Epitaxial Growth ◽  
Film Formation ◽  
The Other ◽  
High Temperature Annealing ◽  
Growth Technique ◽  
Reactive Deposition ◽  
Chromium Evaporation

ABSTRACTThe template growth technique was applied to the growth of CrSi2 thin films on Si(111) by UHV E-gun evaporation. A 4He+ channeling yield of -50% was obtained for an epitaxial -2100 Å-thick film of continuous morphology grown at 450° C The heteroepitaxial relationship is CrSi2 (001) / Si (lll) with CrSi2[210] ∥ Si<110>.In the case of film formation simply via reactive deposition epitaxy (RDE, chromium evaporation onto hot substrates) a severe crystallinity-Morphology tradeoff is always observed. Continuous films are formed at low temperature but no long-range epitaxy is found. On the other hand, high temperature annealing of these films induces the formation of islands that show good epitaxial alignment with the substrate. This tradeoff was addressed with the template growth technique.

Photoluminescence Studies of Annealed GaAs Films Grown on Si Substrates

1988 ◽  
Vol 116 ◽  
Author(s):  
M. Bugajski ◽  
K. Nauka ◽  
S.J. Rosner ◽  
D. Mars
Keyword(s):  
High Temperature ◽  
Low Temperature ◽  
Free Carrier ◽  
Apparent Difference ◽  
High Temperature Annealing ◽  
Si Substrates ◽  
Gaas Films ◽  
Excitonic Emission ◽  
Heavily Doped ◽  
Photoluminescence Studies

AbstractLow temperature (T - 5K) photoluminescence (PL) has been measured on a variety of as-grown and annealed GaAs films grown on Si substrates by the MBE technique. The PL spectra of the annealed GaAs layers showed an apparent difference between the nomigally undoped samples with free carrier concentrations below 1015 cm−3 and the layers with dopant concentrations exceeding 1017 atoms cm−3 . The annealing caused an increase of both excitonic and defect related PL intensities in low doped samples. In heavily doped layers the annealing suppressed excitonic emission and strongly enhanced defect related luminescence bands. Observed post annealed infrared shifts of the PL peaks in the excitonic region are explained assuming a tetragonally distorted GaAs lattice under tensile stress, and an increase in stress after high temperature annealing.

Impact of Polycrystalline Silicon Processing on Properties of MOS Memory Devices

1990 ◽  
Vol 182 ◽  
Author(s):  
G. Queirolo ◽  
M. Brambilla ◽  
C. Mavero
Keyword(s):  
High Temperature ◽  
Low Temperature ◽  
Polycrystalline Silicon ◽  
Breakdown Field ◽  
Memory Devices ◽  
High Temperature Annealing ◽  
High Fluence ◽  
Low Temperature Oxidation ◽  
Temperature Oxidation ◽  
Interpoly Oxide

AbstractIn EEPROMs mèmory devices, tunnel oxides with high fluence, and interpoly oxides with low conductivity and high breakdown field are needed. Tunnel oxide fluence is degraded by high temperature annealing after the polysilicon deposition, while interpoly oxide is degraded by low temperature oxidation, particularly on rough films. As a consequence, a process optimization, giving a good compromise between these two quantities is required. In this work we shown that if a flat polysilicon is used, an interpoly oxide of good quality can be obtained at low temperature, maintaining a high value for the tunnel oxide fluence.

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