VLSI Design and Implementation of a High-Speed Viterbi Decoder

Qing Li

doi:10.1360/crad20071222

VLSI Design and Implementation of a High-Speed Viterbi Decoder

Journal of Computer Research and Development ◽

10.1360/crad20071222 ◽

2007 ◽

Vol 44 (12) ◽

pp. 2143 ◽

Cited By ~ 1

Author(s):

Qing Li

Keyword(s):

High Speed ◽

Vlsi Design ◽

Viterbi Decoder ◽

Design And Implementation

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VLSI design and implementation of high-speed Viterbi decoder

IEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions ◽

10.1109/icccas.2002.1180573 ◽

2003 ◽

Cited By ~ 2

Author(s):

Yu-xin You ◽

Jin-xiang Wang ◽

Feng-chang Lai ◽

Yi-zheng Ye

Keyword(s):

High Speed ◽

Vlsi Design ◽

Viterbi Decoder ◽

Design And Implementation

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VLSI design and implementation of high-speed RS(204,188) decoder

IEEE 2002 International Conference on Communications, Circuits and Systems and West Sino Expositions ◽

10.1109/icccas.2002.1180577 ◽

2003 ◽

Author(s):

You Yu-xin ◽

Wang Jin-xiang ◽

Lai Feng-chang ◽

Ye Yi-zheng

Keyword(s):

High Speed ◽

Vlsi Design ◽

Design And Implementation

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VLSI Design and Implementation of a High-Speed Multicast Switch Fabric

23rd Biennial Symposium on Communications, 2006 ◽

10.1109/bsc.2006.1644641 ◽

2006 ◽

Author(s):

C. Li ◽

R. Venkatesan ◽

H.M. Heys

Keyword(s):

High Speed ◽

Vlsi Design ◽

Switch Fabric ◽

Design And Implementation

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VLSI design and implementation of a reconfigurable hardware-friendly Polar encoder architecture for emerging high-speed 5G system

Integration ◽

10.1016/j.vlsi.2018.03.015 ◽

2018 ◽

Vol 62 ◽

pp. 292-300 ◽

Cited By ~ 1

Author(s):

Xin-Yu Shih ◽

Po-Chun Huang ◽

Hong-Ru Chou

Keyword(s):

High Speed ◽

Vlsi Design ◽

Reconfigurable Hardware ◽

Design And Implementation

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Design and implementation of a high-speed and area-efficient viterbi decoder

2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings ◽

10.1109/icsict.2006.306631 ◽

2006 ◽

Cited By ~ 1

Author(s):

Hao Yang ◽

Xiao-lang Yan

Keyword(s):

High Speed ◽

Viterbi Decoder ◽

Design And Implementation ◽

Area Efficient

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Design and Implementation of High Speed Viterbi Decoder and Convolution Encoder for SDR

Indian Journal of Science and Technology ◽

10.17485/ijst/2019/v12i36/147574 ◽

2019 ◽

Vol 12 (36) ◽

pp. 1-5

Author(s):

Reshmi R. J. ◽

Raji C

Keyword(s):

High Speed ◽

Viterbi Decoder ◽

Design And Implementation

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A VLSI Design of High Speed Bit-level Viterbi Decoder

APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems ◽

10.1109/apccas.2006.342413 ◽

2006 ◽

Cited By ~ 1

Author(s):

Min Woo Kim ◽

Jun Dong Cho

Keyword(s):

High Speed ◽

Vlsi Design ◽

Viterbi Decoder

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Design and Implementation of Low Power High Speed Viterbi Decoder

Procedia Engineering ◽

10.1016/j.proeng.2012.01.834 ◽

2012 ◽

Vol 30 ◽

pp. 61-68 ◽

Cited By ~ 1

Author(s):

K. Cholan

Keyword(s):

Low Power ◽

High Speed ◽

Viterbi Decoder ◽

Design And Implementation

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Design and Implementation of High Speed 64-Bit Multiply and Accumulator Unit Using FPGA

International Journal of Innovative Research in Computer and Communication Engineering ◽

10.15680/ijircce.2015.0305022 ◽

2015 ◽

Vol 03 (05) ◽

pp. 3889-3896 ◽

Cited By ~ 1

Author(s):

Dipika Chauhan, Prof. Kinjal va gadia, Prof. Kirit Patel

Keyword(s):

High Speed ◽

Design And Implementation

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The design and implementation of high-speed real-time optical OFDM transmission based on an IMDD system

International Workshop on Communication Technology 2013 ◽

10.2495/cecnet130211 ◽

2014 ◽

Author(s):

Luo wei Zhang

Keyword(s):

Real Time ◽

High Speed ◽

Design And Implementation ◽

Optical Ofdm

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