AbstractA study is presented of the geometrical shape of deposition contours that arise when material is evaporated from a point source onto an inclined substrate, an arrangement common in ion-assisted deposition. The shape of the contours, as determined by the inverse square law and the angles of emission and incidence, is described by a fourth-order algebraic equation in polar coordinates on the surface of the substrate. The equation defines a family of distorted ellipses whose form depends on the angle of tilt. An experimental test of these relations by electron-beam deposition of an ion-bombarded oil film on a tilted silicon wafer will be reported.
AbstractNano-crystalline silicon (nc-Si) thin films were directly deposited by electron cyclotron resonance chemical vapor deposition (ECR-CVD) and ion beam assisted electron beam deposition (IBAED) method. In the sample deposited by ECR-CVD, the room temperature photoluminescence originated from the nc-Si and the silicon-hydrogen bond were appeared. It was confirmed that the size of the nc-Si could be controlled up to about 3 nm with the low substrate temperature during the deposition process and then the hydrogen atoms play a very important role in the formation of the nc-Si. The IBAED method was also found to an useful technique for nc-Si formation by the control of ion beam power.
Abstract
When failure analysis is performed on a circuit composed of FinFETs, the degree of defect isolation, in some cases, requires isolation to the fin level inside the problematic FinFET for complete understanding of root cause. This work shows successful application of electron beam alteration of current flow combined with nanoprobing for precise isolation of a defect down to fin level. To understand the mechanism of the leakage, transmission electron microscopy (TEM) slice was made along the leaky drain contact (perpendicular to fin direction) by focused ion beam thinning and lift-out. TEM image shows contact and fin. Stacking fault was found in the body of the silicon fin highlighted by the technique described in this paper.
Abstract
To debug ASIC we likely use accurate tools such as an electron beam tester (Ebeam tester) and a Focused Ion Beam (FIB). Interactions between ions or electrons and the target device build charge up on its upper glassivation layer. This charge up could trigger several problems. With Ebeam testing, it sharply decreases voltage contrast during Image Fault Analysis and hide static voltage contrast. During ASIC reconfiguration with FIB, it could induce damages in the glassivation layer. Sample preparation is getting a key issue and we show how we can deal with it by optimizing carbon coating of the devices. Coating is done by an evaporator. For focused ion beam reconfiguration, we need a very thick coating. Otherwise the coating could be sputtered away due to imaging. This coating is use either to avoid charge-up on glassivated devices or as a sacrificial layer to avoid short circuits on unglassivated devices. For electron beam Testing, we need a very thin coating, we are now using an electrical characterization method with an insitu control system to obtain the right thin thickness. Carbon coating is a very cheap and useful method for sample preparation. It needs to be tuned according to the tool used.