scholarly journals Reliability Testing of Electrically Conductive Adhesive Joints for Surface Mount Printed-circuit-board

2007 ◽  
Vol 43 (5) ◽  
pp. 187-194
Author(s):  
Hirokazu TANAKA
Author(s):  
Sharon A. Myers ◽  
Troy D. Cognata ◽  
Hugh Gotts

Logic boards were failing at Enhanced Mac Minus One (EMMO) test or Integrated Circuit Test (ICT) after printed circuit board (PCB) rework. The failure to boot was originally traced to a suspected bad microcontroller chip. Replacing this chip, or an oscillator tied to the microcontroller circuit, did not consistently solve the boot problem. With further testing, it was found the microcontroller circuit was very sensitive to resistance and was essentially shorted.A resistor in the microcontroller circuit was identified on the flip side of the PCB. Several areas on the board, including the resistor R161, were seen to have a slight white haze/ low gloss appearance on the surface of the PCB. To test if the residue was electrically conductive, five boards were selected whose sole failure was R161. The resistance of the individual resistors was measured with a digital multimeter (DMM). The resistor was then cleaned with isopropyl alcohol and a cotton swab. Each board was retested at ICT and the individual resistors measured again with a DMM. Cleaning the area surrounding the resistor with isopropyl alcohol, corrected the failure four of the times.


Author(s):  
Gerald Weis

Increasing efficiency in power electronic circuits requires innovative cooling concepts and a low impedance connection in the power path as well as low inductance driving circuits placed as close as possible to the main power switches. A direct comparison between state-of-the-art standard surface-mount build-ups and power switches embedded directly into the printed circuit board shows the high potential of integrated electronics. Measurements at defined operating point(s) verify improved thermal performance due to more heat spreading area, as well as higher achievable switching speed. For performance benchmarking two similar versions of half bridge circuits in DC-DC buck configuration were built to be compared in measurement. The first configuration uses standard, state-of-the-art SMD packages assembled onto the module. For the second half bridge module an embedded power path was used: The power transistors (GaN HEMT devices) are mounted inside the printed circuit board (PCB) and galvanically isolated from the heat sink pad on top of the package. Both versions use exactly the same schematic, layer stack-up and copper structure on the six layers used. A slightly different laser drill configuration was necessary because embedded parts are connected by copper filled laser drill holes. This measure was taken to optimize the modules according to their technology. Each module has an NTC thermistor mounted at the same distance to the half bridge transistors, and is used to indicate the temperature of the transistor dies during measurement. To cover a wide range of operational conditions the devices under test (DUTs) were stressed under hard switching operation (HSW) as well as triangular current mode (TCM). HSW causes more stress because the opposite transistor is switched before the whole energy of Coss has been discharged. In TCM the current through the inductor is becoming negative for a short time period and discharges the Coss capacitors of the power transistors. The test conditions were set as follows: 150V, 11A with 200kHz switching frequency in HSW mode. The switching behavior is similar, because both modules uses the same power transistors. Due to less parasitic impedance at the embedded module the turn-on behavior is slightly improved at the embedded module. Embedding as a new, innovative concept is compared to standard technologies. First measurements show that the embedded DUT stays 20K below the temperature of the standard module while running at the same load current. Additionally fewer disturbances were observed at the embedded module.


2017 ◽  
Vol 2017 (1) ◽  
pp. 000652-000658
Author(s):  
Mimi X. Yang ◽  
Karen Dowling ◽  
Debbie Senesky ◽  
H.-S. Philip Wong

Abstract This works describes a promising method for rapid prototyping tape stencils for the application of solder paste. This process is appropriate for research settings requiring developmental flexibility and the ability to deal with small device dies. This work compares the volume of solder paste deposited versus aperture volume for several common tape materials and several common printed circuit board (PCB) stencil materials. The solder deposits are then reflowed to identify which aperture and solder paste parameters can generate successful solder bumps. Electrically conductive solder bonds for small bond pads (100 μm and larger) are demonstrated between silicon device dies and glass dies using this process.


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