scholarly journals Chebyshev Bandpass Filter Using Resonator of Tunable Active Capacitor and Inductor

VLSI Design ◽  
2017 ◽  
Vol 2017 ◽  
pp. 1-12 ◽  
Author(s):  
Yu Wang ◽  
Jian Chen ◽  
Chien-In Henry Chen
Keyword(s):  
Bandpass Filter ◽  
Low Cost ◽  
Center Frequency ◽  
Pass Band ◽  
Cmos Process ◽  
Frequency Range ◽  
Active Components ◽  
Fully Integrated ◽  
Nanometer Cmos ◽  
Tuning Frequency

A classic second-order coupled-capacitor Chebyshev bandpass filter using resonator of tunable active capacitor and inductor is presented. The low cost and small size of CMOS active components make the bandpass filter (BPF) attractive in fully integrated CMOS applications. The tunable active capacitor is designed to compensate active inductor’s resistance for resistive match in the resonator. In many design cases, more than 95% resistive loss is cancelled. Meanwhile, adjusting design parameter of the active component provides BPF tunability in center frequency, pass band, and pass band gain. Designed in 1.8 V 180 nanometer CMOS process, the BPF has a tuning frequency range of 758–864 MHz, a controllable pass band of 7.1–65.9 MHz, a quality factor Q of 12–107, a pass band gain of 6.5–18.1 dB, and a stopband rejection of 38–50 dB.

Research and Analysis of Tunable Differential N-Path Band-Pass Filter

2020 ◽  
pp. 2150055
Author(s):  
Shuxiang Song ◽  
Guolun Liu ◽  
Mingcan Cen ◽  
Chaobo Cai
Keyword(s):  
Bandpass Filter ◽  
Noise Figure ◽  
Supply Voltage ◽  
Impedance Matching ◽  
Transmission Function ◽  
Center Frequency ◽  
Cmos Process ◽  
Band Pass Filter ◽  
Pass Filter ◽  
Circuit Structure

Traditional filters usually have low Q and gain values and it is difficult to adjust their center frequencies. Moreover, it is very complicated to analyze their transmission charateristics through conventional methods. Therefore, in this paper, a tunable differential N-path bandpass filter that uses a new adjoint network method to analyze the transmission characteristics of the differential N-path structure is proposed. The filter circuit adopts a novel circuit structure consisting of two differential N-path structures, two transconductance amplifiers and an off-chip transformer. The differential structure eliminates even harmonics, the transconductance amplifier increases the circuit gain and the off-chip transformer acts as a balun, improving the filter’s Q value and achieving impedance matching. Unlike the traditional switching capacitance method used for analyzing the differential circuit structure, the method proposed in this paper does not involve complicated calculus operations. In fact, the method greatly simplifies these complex operations, and the transmission function of the circuit can be obtained through simple algebraic operations. The proposed filter was designed using TSMC 180[Formula: see text]nm CMOS process. Simulation results for a differential four-path bandpass filter formed under 1.2[Formula: see text]V supply voltage show that the gain of the filter is greater than 8.5 dB, the center frequency can be adjusted from 0.1[Formula: see text]GHz to 1[Formula: see text]GHz, the in-band insertion loss S11 is greater than 10 dB, the out-of-band IIP3 is greater than 10 dBm, the out-of-band rejection is 28 dB and the noise figure is less than 2.2 dB at [Formula: see text][Formula: see text]MHz.

Stacked Spiral Inductor Design and Modeling for Fully-Integrated DC-DC Converters

2011 ◽  
Vol 135-136 ◽  
pp. 918-923 ◽  
Author(s):  
Qing Hua Li
Keyword(s):  
Quality Factor ◽  
Series Resistance ◽  
Metal Strip ◽  
Point Of View ◽  
Spiral Inductor ◽  
Cmos Process ◽  
Frequency Range ◽  
Substrate Effects ◽  
Fully Integrated ◽  
Structural Point

A structure of multi-layer spiral inductor having parallel and series branches of the metal strip was designed for fully-integrated DC-DC converters. As the result that the parallel branching structure greatly reduced the series resistance and the series branching structure greatly improved the series inductance of the inductor, the structure can achieve quality factor and current capability enhancement while compatible with conventional CMOS process. The quality factor was quantitatively analyzed with a scalable model and its origin was investigated at a structural point of view. From the experiment results, the substrate effects can be neglected in the interesting frequency range, 50MHz -500MHz, and the quality factor is enhanced beyond the additional parasitic capacitance.

A FULLY INTEGRATED MULTIBAND CMOS 0.35 μM LNA FOR IEEE802.16 STANDARD

2013 ◽  
Vol 22 (02) ◽  
pp. 1250088 ◽  
Author(s):  
MERIAM BEN AMOR ◽  
MOURAD LOULOU ◽  
SEBASTIEN QUINTANEL ◽  
DANIEL PASQUET
Keyword(s):  
Noise Figure ◽  
Supply Voltage ◽  
Wide Band ◽  
Low Noise ◽  
Cmos Process ◽  
Frequency Range ◽  
Fully Integrated ◽  
Input Matching ◽  
Noise Amplifier ◽  
Chebyshev Filter

In this paper we present the design of a fully integrated low noise amplifier for WiMAX standard with AMS 0.35 μm CMOS process. This LNA is designed to cover the frequency range for licensed and unlicensed bands of the WiMAX 2.3–5.9 GHz. The proposed amplifier achieves a wide band input and output matching with S11 and S22 lower than -10 dB, a flat gain of 12 dB and a noise figure around 3.5 dB for the entire band and from the upper to the higher frequencies. The presented wide band LNA employs a Chebyshev filter for input matching and an inductive shunt feedback for output matching with a bias current of 15 mA and a supply voltage of 2.5 V.

scholarly journals Microstrip Compact Twin-Interdigital Steped Impedance Resonator-Based Bandpass Filter for C-Band Applications

2018 ◽  
Vol 4 ◽  
pp. 119-124
Author(s):  
Ram Krishna Maharjan
Keyword(s):  
Insertion Loss ◽  
Return Loss ◽  
Bandpass Filter ◽  
Software Tool ◽  
Center Frequency ◽  
Pass Band ◽  
Network Analyzer ◽  
High Return ◽  
Low Pass ◽  
Stepped Impedance Resonator

This research focuses a new microstrip twin-interdigital type bandpass filter based on stepped impedance resonator (SIR) structure. The proposed structure consists of two slightly different interdigital capacitances within a single SIR resonator that behaves as a bandpass filter (BPF) of center frequency 4.3 GHz with 700 MHz bandwidth at 3 dB pass band. This design is not only subjected to size reduction, but also low pass-band insertion loss and high return loss as well. The Sonnet software tool has been used to design and simulate the microstrip BPF. The fabricated BPF was measured using the Agilent 8510C vector network analyzer (VNA) and achieved the insertion loss of 0.5 dB and the return loss of 26 dB. The measured results were compared with those simulated results which were very close to each other. The fabricated BPF can be used for Cband Applications.

A VERY LOW POWER BANDPASS FILTER FOR LOW-IF APPLICATIONS

2008 ◽  
Vol 17 (04) ◽  
pp. 685-701 ◽  
Author(s):  
Gh. ZAREH FATIN ◽  
Z. D. KOOZEH KANANI
Keyword(s):  
Bandpass Filter ◽  
Dynamic Range ◽  
Second Order ◽  
Center Frequency ◽  
Cmos Process ◽  
Considerable Saving ◽  
Biquad Filter ◽  
External Reference ◽  
On Chip ◽  
Order Structures

This paper presents a second-order bandpass filter for IF frequencies in the range of 500 kHz–2 MHz. By using a single Gm–cell as a biquad filter, considerable saving in area and power is feasible. Higher order structures can be achieved by cascading this second-order block. This Gm-C filter achieves a dynamic range of 37 dB for 1% IM3 in Bluetooth while dissipating only 10.5 mW from 3.3 power supply in 0.35 μm CMOS process. The on-chip indirect automatic tuning circuit sets the filter center frequency to an external reference clock.

scholarly journals Designing a Microstrip coupled line bandpass filter

2013 ◽  
Vol 2 (4) ◽  
pp. 266 ◽  
Author(s):  
Taoufik Ragani ◽  
N. Amar Touhami ◽  
M. Agoutane
Keyword(s):  
Wireless Communication ◽  
Significant Role ◽  
Communication Systems ◽  
Bandpass Filter ◽  
Bandpass Filters ◽  
Center Frequency ◽  
Wireless Communication Systems ◽  
Frequency Range ◽  
Wide Bandwidth ◽  
Coupled Line

Bandpass filters play a significant role in wireless communication systems. Transmitted and received signals have to be filtered at a certain center frequency with a specific bandwidth, in this paper, a coupled-line bandpass Filter at the center frequency 6 GHz with the wide bandwidth of 2 GHz. this type of filter can be used in WLAN and other applications for the frequency range of 5-7 GHz.

scholarly journals Design of an Offset Posts K- band Bandpass Filter using Substrate Integrated Waveguide for Microwave Applications

2020 ◽  
Vol 8 (6) ◽  
pp. 1056-1058
Keyword(s):  
Bandpass Filter ◽  
Dielectric Material ◽  
Ground Plane ◽  
Center Frequency ◽  
Pass Band ◽  
Substrate Integrated Waveguide ◽  
Low Loss ◽  
Communication Devices ◽  
Good Agreement ◽  
K Band

In this paper, an offset posts K-band bandpass filter has been designed using substrate integrated waveguide (SIW). SIW is formed inside a dielectric material by applying a top metal over the ground plane and trapping the structure on either side with rows of plated vias. SIW is effective and efficient solution in waveguide technique. The slotted windows are cut in tapered transition of SIW filter to attain low loss. The proposed filters are designed at 23 GHz center frequency. The simulated results exhibit low losses and sharp roll off characteristics in pass band. There is good agreement between the simulated results and the experimental results. The proposed filter is suitable for use in microwave communication devices.

scholarly journals Low-Power RFED Wake-Up Receiver Design for Low-Cost Wireless Sensor Network Applications

Sensors ◽  
2020 ◽  
Vol 20 (22) ◽  
pp. 6406
Author(s):  
David Galante-Sempere ◽  
Dailos Ramos-Valido ◽  
Sunil Lalchand Khemchandani ◽  
Javier del Pino
Keyword(s):  
Power Consumption ◽  
Low Cost ◽  
Sensor Nodes ◽  
Wireless Sensor ◽  
Cmos Process ◽  
Receiver Design ◽  
High Integrability ◽  
Active Components ◽  
Total Size ◽  
Area Reduction

The development of wake-up receivers (WuR) has recently received a lot of interest from both academia and industry researchers, primarily because of their major impact on the improvement of the performance of wireless sensor networks (WSNs). In this paper, we present the development of three different radiofrequency envelope detection (RFED) based WuRs operating at the 868 MHz industrial, scientific and medical (ISM) band. These circuits can find application in densely populated WSNs, which are fundamental components of Internet-of-Things (IoT) or Internet-of-Everything (IoE) applications. The aim of this work is to provide circuits with high integrability and a low cost-per-node, so as to facilitate the implementation of sensor nodes in low-cost IoT applications. In order to demonstrate the feasibility of implementing a WuR with commercially available off-chip components, the design of an RFED WuR in a PCB mount is presented. The circuit is validated in a real scenario by testing the WuR in a system with a pattern recognizer (AS3933), an MCU (MSP430G2553 from TI), a transceiver (CC1101 from TI) and a T/R switch (ADG918). The WuR has no active components and features a sensitivity of about −50 dBm, with a total size of 22.5 × 51.8 mm2. To facilitate the integration of the WuR in compact systems and low-cost applications, two designs in a commercial UMC 65 nm CMOS process are also explored. Firstly, an RFED WuR with integrated transformer providing a passive voltage gain of 18 dB is demonstrated. The circuit achieves a sensitivity as low as −62 dBm and a power consumption of only 528 nW, with a total area of 634 × 391 μm2. Secondly, so as to reduce the area of the circuit, a design of a tuned-RF WuR with integrated current-reuse active inductor is presented. In this case, the WuR features a sensitivity of −55 dBm with a power consumption of 43.5 μW and a total area of 272 × 464 μm2, obtaining a significant area reduction at the expense of higher power consumption. The alternatives presented show a very low die footprint with a performance in line with most of the state-of-the-art contributions, making the topologies attractive in scenarios where high integrability and low cost-per-node are necessary.

scholarly journals A Q-Enhanced 3.6 GHz, Tunable, Sixth-Order Bandpass Filter Using 0.18 μm CMOS

VLSI Design ◽  
2007 ◽  
Vol 2007 ◽  
pp. 1-9 ◽  
Author(s):  
Anh Dinh ◽  
Jiandong Ge
Keyword(s):  
High Performance ◽  
Bandpass Filter ◽  
Sixth Order ◽  
Center Frequency ◽  
Voltage Gain ◽  
Image Rejection ◽  
Three Stages ◽  
On Chip ◽  
Tuning Frequency ◽  
Tuning Scheme

An experimental filter was designed to operate at 3.6 GHz using mainstream 0.18 μm CMOS. In the design, the Q-enhancement technique was used to overcome the low-Q characteristics of the CMOS on-chip inductors. A sixth-order bandpass filter with a wide passband and a high image rejection was built by cascading three stages of second-order Q-enhanced filters. A combination of three biquads with offset in center frequency provides wider tuning frequency and bandwidth. This high-performance filter provides a 340 MHz tunable center frequency around 3.6 GHz, an image rejection of 50 dB and a tunable Q from 25 to 50 for a bandwidth adjustment from 95 MHz to 35   MHz. The filter achieves an 18 dB voltage gain while consuming 130 mW of power at 1.8 V DC supply. The chip occupies an area of 900×900μm2 including all the required bonding pads. The design provides a simple architecture to simplify tuning scheme for both frequency and bandwidth for practical use. The tunable ability of the design could be exploited in further study to be used as a channel-select filter in the gigahertz range.

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