A low power low cost fully integrated UHF RFID reader with 17.6dBm output P1dB in 0.18 µm CMOS process

2010 ◽  
Author(s):  
Jingchao Wang ◽  
Chun Zhang ◽  
Zhihua Wang
Keyword(s):  
Low Power ◽  
Low Cost ◽  
Cmos Process ◽  
Uhf Rfid ◽  
Fully Integrated ◽  
Rfid Reader

A fully integrated UHF RFID reader SoC for handheld applications in the 0.18 μm CMOS process

2010 ◽  
Vol 31 (8) ◽  
pp. 085005 ◽  
Author(s):  
Wang Jingchao ◽  
Zhang Chun ◽  
Wang Zhihua
Keyword(s):  
Cmos Process ◽  
Uhf Rfid ◽  
Fully Integrated ◽  
Rfid Reader

scholarly journals Design of a low-power, low-cost UHF RFID reader module

2016 ◽  
Vol 24 ◽  
pp. 2747-2755 ◽  
Author(s):  
Özgür BOSTAN ◽  
Hüseyin Ulvi AYDOĞMUŞ ◽  
Serkan TOPALOĞLU
Keyword(s):  
Low Power ◽  
Low Cost ◽  
Uhf Rfid ◽  
Rfid Reader

A ROBUST 900 MHz RFID READER CHIP WITH RC-CALIBRATION

2012 ◽  
Vol 21 (08) ◽  
pp. 1240021
Author(s):  
MOU SHOUXIAN ◽  
MA KAIXUE ◽  
YEO KIAT SENG
Keyword(s):  
Low Cost ◽  
Cmos Process ◽  
Digital To Analog Converter ◽  
Filter Bandwidth ◽  
Chip Area ◽  
Fully Integrated ◽  
Rfid Reader ◽  
Analog Converter ◽  
Phase Noise Performance ◽  
Fine Tune

A fully integrated RFID reader chip targeted to operate in the frequency range of 860 MHz to 960 MHz is designed, simulated and fabricated. To reduce the chip performance degradation due to process and temperature variation, resistor and capacitor calibration is adopted. The output codes of resistor calibration are used to adjust main circuit blocks' biasing current while the output codes of capacitor calibration are used to fine tune filter bandwidth and Digital-to-analog converter (DAC) conversion accuracy. Dual-tuned magnetic coupled LC tanks are also introduced in our VCO design to improve phase noise performance and extend tuning range, so as to enhance the robustness of the proposed RFID reader system. The reader is implemented with a low cost 90 nm standard CMOS process and has a chip area of 3.1 mm by 3.3 mm. The chip is packaged with QFN48 and tested on PCB. The proposed RFID reader consumes 90 mW of power and has robust performance against temperature, voltage supply and process variation. The merits of the chip make it ideal for various application scenarios.

scholarly journals A Single-Chip UHF RFID Reader in 0.18 $\mu{\hbox {m}}$ CMOS Process

2008 ◽  
Vol 43 (8) ◽  
pp. 1741-1754 ◽  
Author(s):  
Wenting Wang ◽  
Shuzuo Lou ◽  
Kay W. C. Chui ◽  
Sujiang Rong ◽  
Chi Fung Lok ◽  
...  
Keyword(s):  
Cmos Process ◽  
Uhf Rfid ◽  
Single Chip ◽  
Rfid Reader

A LOW-POWER UWB TRANSCEIVER BY USE OF TRIGGER RECEIVING METHOD

2010 ◽  
Vol 19 (07) ◽  
pp. 1609-1619 ◽  
Author(s):  
SHENG ZHANG ◽  
ZHENG LI ◽  
MENGMENG LIU ◽  
XIAOKANG LIN
Keyword(s):  
Energy Consumption ◽  
Power Consumption ◽  
Low Power ◽  
Power Supply ◽  
Circuit Complexity ◽  
Cmos Process ◽  
Fully Integrated

This paper presents a novel non-coherent receiving algorithm termed trigger receiving algorithm. In comparison with conventional coherent receiving method, the trigger receiving algorithm needs neither local template nor correlation operation, thus both circuit complexity and power consumption are drastically reduced. Based on the proposed algorithm, a fully integrated transceiver was implemented in a 0.18 μ m CMOS process. It occupies an area of 0.44 mm2 and achieves a maximum chip rate of 40 Mbps with 7 mW energy consumption provided by a 1.8 V power supply.

A novel compact low-power direct conversion receiver for mobile UHF RFID reader

2012 ◽  
Vol 55 (10) ◽  
pp. 2226-2233 ◽  
Author(s):  
Shan Liu ◽  
Xin’An Wang ◽  
JinPeng Shen ◽  
Bo Wang ◽  
Tao Ye ◽  
...  
Keyword(s):  
Low Power ◽  
Direct Conversion ◽  
Uhf Rfid ◽  
Rfid Reader

A low power voltage limiter for a full passive UHF RFID sensor on a 0.35μm CMOS process

2012 ◽  
Vol 43 (10) ◽  
pp. 708-713 ◽  
Author(s):  
E. Fernández ◽  
A. Beriain ◽  
H. Solar ◽  
I. Rebollo ◽  
A. García-Alonso ◽  
...  
Keyword(s):  
Low Power ◽  
Cmos Process ◽  
Uhf Rfid ◽  
Passive Uhf Rfid
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