scholarly journals Optimization and Characterization of CMOS for Ultra Low Power Applications

2015 ◽  
Vol 2015 ◽  
pp. 1-6
Author(s):  
Mohd. Ajmal Kafeel ◽  
S. D. Pable ◽  
Mohd. Hasan ◽  
M. Shah Alam
Keyword(s):  
Low Voltage ◽  
Great Promise ◽  
Electrical Characteristics ◽  
Design Constraint ◽  
Voltage Level ◽  
Ultra Low Power ◽  
Operating Region ◽  
Tcad Simulation ◽  
Subthreshold Circuits

Aggressive voltage scaling into the subthreshold operating region holds great promise for applications with strict energy budget. However, it has been established that higher speed superthreshold device is not suitable for moderate performance subthreshold circuits. The design constraint for selectingVthandTOXis much more flexible for subthreshold circuits at low voltage level than superthreshold circuits. In order to obtain better performance from a device under subthreshold conditions, it is necessary to investigate and optimize the process and geometry parameters of a Si MOSFET at nanometer technology node. This paper calibrates the fabrication process parameters and electrical characteristics for n- and p-MOSFETs with 35 nm physical gate length. Thereafter, the calibrated device for superthreshold application is optimized for better performance under subthreshold conditions using TCAD simulation. The device simulated in this work shows 9.89% improvement in subthreshold slope and 34% advantage inION/IOFFratio for the same drive current.

scholarly journals A high electrical performance of DG-MOSFET transistors in 4H-SiC and 6H-SiC 130 nm technology by BSIM3v3 model

2019 ◽  
Vol 70 (2) ◽  
pp. 145-151
Author(s):  
Mourad Hebali ◽  
Menaouer Bennaoum ◽  
Mohammed Berka ◽  
Abdelkader Baghdad Bey ◽  
Mohammed Benzohra ◽  
...  
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Electrical Characterization ◽  
Electrical Performance ◽  
Subthreshold Slope ◽  
Ultra Low Power ◽  
Dg Mosfet ◽  
Subthreshold Operation ◽  
Very High

Abstract In this paper, the electrical performance of double gate DG-MOSFET transistors in 4H-SiC and 6H-SiC technologies have been studied by BSIM3v3 model. In which the I–V and gm–V characteristics and subthreshold operation of the DGMOSFET have been investigated for two models (series and parallel) based on equivalent electronic circuits and the results so obtained are compared with the single gate SG-MOSFET, using 130 nm technology and OrCAD PSpice software. The electrical characterization of DG-MOSFETs transistors have shown that they operate under a low voltage less than 1.2 V and low power for both models like the SG-MOSFET transistor, especially the series DG-MOSFET transistor is characterized by an ultra low power. The different transistors are characterized by an ultra low OFF leakage current of pA order, very high ON/OFF ratio of and high subthreshold slope of order 0.1 V/dec for the transistors in 6H-SiC and 4H-SiC respectively. These transistors also proved higher transconductance efficiency, especially the parallel DG-MOSFET transistor.

Structural and Electrical Characterization of Shaped Beam Laser Recrystallized Polysilicon on Amorphous Substrates

1981 ◽  
Vol 4 ◽  
Author(s):  
T. J. Stultz ◽  
J. F. Gibbons
Keyword(s):  
Grain Size ◽  
Electrical Characterization ◽  
Grain Structure ◽  
Electrical Characteristics ◽  
Shaped Beam ◽  
Beam Laser ◽  
Cw Laser ◽  
Amorphous Substrates ◽  
Circular Beam

ABSTRACTStructural and electrical characterization of laser recrystallized LPCVD silicon films on amorphous substrates using a shaped cw laser beam have been performed. In comparing the results to data obtained using a circular beam, it was found that a significant increase in grain size can be achieved and that the surface morphology of the shaped beam recrystallized material was much smoother. It was also found that whereas circular beam recrystallized material has a random grain structure, shaped beam material is highly oriented with a <100> texture. Finally the electrical characteristics of the recrystallized film were very good when measured in directions parallel to the grain boundaries.

Nanoprobing Application on Characterization of 6T-SRAM Single Bit Failures with Different Gox Breakdown Defect

2006 ◽  
Author(s):  
Cheng-Piao Lin ◽  
Chin-Hsin Tang ◽  
Cheng-Hsu Wu ◽  
Cheng-Chun Ting
Keyword(s):  
Copper Metallization ◽  
Physical Analysis ◽  
Electrical Characteristics ◽  
Gate Leakage Current ◽  
Data Retention ◽  
Simulation Data ◽  
Failure Data ◽  
Dual Gate ◽  
Soft Breakdown

Abstract This paper analyzes several SRAM failures using nano-probing technique. Three SRAM single bit failures with different kinds of Gox breakdown defects analyzed are gross function single bit failure, data retention single bit failure, and special data retention single bit failure. The electrical characteristics of discrete 6T-SRAM cells with soft breakdown are discussed and correlated to evidences obtained from physical analysis. The paper also verifies many previously published simulation data. It utilizes a 6T-SRAM vehicle consisting of a large number of SRAM cells fabricated by deep sub-micron, dual gate, and copper metallization processes. The data obtained from this paper indicates that Gox breakdown location within NMOS pull-down device has larger a impact on SRAM stability than magnitude of gate leakage current, which agrees with previously published simulation data.

scholarly journals Clonal approaches to understanding the impact of mutations on hematologic disease development

Blood ◽  
2019 ◽  
Vol 133 (13) ◽  
pp. 1436-1445 ◽  
Author(s):  
Jyoti Nangalia ◽  
Emily Mitchell ◽  
Anthony R. Green
Keyword(s):  
Somatic Mutations ◽  
Clonal Selection ◽  
Single Cells ◽  
Driver Mutations ◽  
Great Promise ◽  
Tumor Evolution ◽  
Disease Development ◽  
Hematopoietic Tissue ◽  
The Impact

Abstract Interrogation of hematopoietic tissue at the clonal level has a rich history spanning over 50 years, and has provided critical insights into both normal and malignant hematopoiesis. Characterization of chromosomes identified some of the first genetic links to cancer with the discovery of chromosomal translocations in association with many hematological neoplasms. The unique accessibility of hematopoietic tissue and the ability to clonally expand hematopoietic progenitors in vitro has provided fundamental insights into the cellular hierarchy of normal hematopoiesis, as well as the functional impact of driver mutations in disease. Transplantation assays in murine models have enabled cellular assessment of the functional consequences of somatic mutations in vivo. Most recently, next-generation sequencing–based assays have shown great promise in allowing multi-“omic” characterization of single cells. Here, we review how clonal approaches have advanced our understanding of disease development, focusing on the acquisition of somatic mutations, clonal selection, driver mutation cooperation, and tumor evolution.

scholarly journals Voltage Variations and Their Reduction in a Rural Low-Voltage Network with PV Sources of Energy

Electronics ◽  
2021 ◽  
Vol 10 (14) ◽  
pp. 1620
Author(s):  
Agata Szultka ◽  
Seweryn Szultka ◽  
Stanislaw Czapp ◽  
Ryszard Zajczyk
Keyword(s):  
Low Voltage ◽  
Power Production ◽  
Legal Regulations ◽  
Sectional Area ◽  
Overhead Line ◽  
Power Networks ◽  
Cable Line ◽  
Cross Sectional ◽  
Voltage Level ◽  
Wide Scale

Renewable sources of energy (RES), especially photovoltaic (PV) micro-sources, are very popular in many countries. This way of clean power production is applied on a wide scale in Poland as well. The Polish legal regulations and tariffs specify that every prosumer in a low-voltage network may feed this network with a power not higher than the maximum declared consumed power. In power networks with RES, the voltage level changes significantly along the power line and depends on the actually generated as well as consumed power by particular prosumers. There are cases that prosumers connected to this line cannot produce and inject the full permissible power from PV sources due to the level of a voltage higher than the technically acceptable value. In consequence, it leads to the lack of profitability of investments in installations with PV sources. In this paper, voltage variations in a real rural low-voltage network with PV micro-sources are described. The possible two general solutions of voltage levels improvement are discussed—increase in the cross-sectional area of the bare conductors in the existing overhead line as well as the replacement of the overhead line with a cable line. The recommended solution for the analyzed network, giving the best reduction of voltage variations and acceptable cost, is underlined. Such a recommendation can also be utilized in other rural networks.

scholarly journals Design Strategies and Architectures for Ultra-Low-Voltage Delta-Sigma ADCs

Electronics ◽  
2021 ◽  
Vol 10 (10) ◽  
pp. 1156
Author(s):  
Lorenzo Benvenuti ◽  
Alessandro Catania ◽  
Giuseppe Manfredini ◽  
Andrea Ria ◽  
Massimo Piotto ◽  
...  
Keyword(s):  
Low Voltage ◽  
Flicker Noise ◽  
Supply Voltage ◽  
Cmos Process ◽  
Clock Frequency ◽  
Design Environment ◽  
Ultra Low Power ◽  
Analog Cmos ◽  
Gain Error ◽  
Dc Gain

The design of ultra-low voltage analog CMOS integrated circuits requires ad hoc solutions to counteract the severe limitations introduced by the reduced voltage headroom. A popular approach is represented by inverter-based topologies, which however may suffer from reduced finite DC gain, thus limiting the accuracy and the resolutions of pivotal circuits like analog-to-digital converters. In this work, we discuss the effects of finite DC gain on ultra-low voltage ΔΣ modulators, focusing on the converter gain error. We propose an ultra-low voltage, ultra-low power, inverter-based ΔΣ modulator with reduced finite-DC-gain sensitivity. The modulator employs a two-stage, high DC-gain, switched-capacitor integrator that applies a correlated double sampling technique for offset cancellation and flicker noise reduction; it also makes use of an amplifier that implements a novel common-mode stabilization loop. The modulator was designed with the UMC 0.18 μm CMOS process to operate with a supply voltage of 0.3 V. It was validated by means of electrical simulations using the CadenceTM design environment. The achieved SNDR was 73 dB, with a bandwidth of 640 Hz, and a clock frequency of 164 kHz, consuming only 200.5 nW. It achieves a Schreier Figure of Merit of 168.1 dB. The proposed modulator is also able to work with lower supply voltages down to 0.15 V with the same resolution and a lower power consumption despite of a lower bandwidth. These characteristics make this design very appealing in sensor interfaces powered by energy harvesting sources.

scholarly journals The Study of the Single Event Effect in AlGaN/GaN HEMT Based on a Cascode Structure

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 440
Author(s):  
Yanan Liang ◽  
Rui Chen ◽  
Jianwei Han ◽  
Xuan Wang ◽  
Qian Chen ◽  
...  
Keyword(s):  
Low Voltage ◽  
Ion Irradiation ◽  
Heavy Ion ◽  
Track Length ◽  
Single Event ◽  
Single Event Effects ◽  
Heavy Ion Irradiation ◽  
Enhancement Mode ◽  
Gan Hemt ◽  
Tcad Simulation

An attractive candidate for space and aeronautic applications is the high-power and miniaturizing electric propulsion technology device, the gallium nitride high electron mobility transistor (GaN HEMT), which is representative of wide bandgap power electronic devices. The cascode AlGaN/GaN HEMT is a common structure typically composed of a high-voltage depletion-mode AlGaN/GaN HEMT and low-voltage enhancement-mode silicon (Si) MOSFET connected by a cascode structure to realize its enhancement mode. It is well known that low-voltage Si MOSFET is insensitive to single event burnout (SEB). Therefore, this paper mainly focuses on the single event effects of the cascode AlGaN/GaN HEMT using technical computer-aided design (TCAD) simulation and heavy-ion experiments. The influences of heavy-ion energy, track length, and track position on the single event effects for the depletion-mode AlGaN/GaN HEMT were studied using TCAD simulation. The results showed that a leakage channel between the gate electrode and drain electrode in depletion-mode AlGaN/GaN HEMT was formed after heavy-ion striking. The enhancement of the ionization mechanism at the edge of the gate might be an important factor for the leakage channel. To further study the SEB effect in AlGaN/GaN HEMT, the heavy-ion test of a cascode AlGaN/GaN HEMT was carried out. SEB was observed in the heavy-ion irradiation experiment and the leakage channel was found between the gate and drain region in the depletion-mode AlGaN/GaN HEMT. The heavy-ion irradiation experimental results proved reasonable for the SEB simulation for AlGaN/GaN HEMT with a cascode structure.

scholarly journals Cardiac Computed Tomography Radiomics for the Non-Invasive Assessment of Coronary Inflammation

Cells ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 879
Author(s):  
Kevin Cheng ◽  
Andrew Lin ◽  
Jeremy Yuvaraj ◽  
Stephen J. Nicholls ◽  
Dennis T.L. Wong
Keyword(s):  
Cardiac Computed Tomography ◽  
Quantitative Information ◽  
Imaging Biomarkers ◽  
Great Promise ◽  
Non Invasive ◽  
Quantitative Image ◽  
Artery Disease ◽  
Therapeutic Decision Making ◽  
Underlying Pathophysiology

Radiomics, via the extraction of quantitative information from conventional radiologic images, can identify imperceptible imaging biomarkers that can advance the characterization of coronary plaques and the surrounding adipose tissue. Such an approach can unravel the underlying pathophysiology of atherosclerosis which has the potential to aid diagnostic, prognostic and, therapeutic decision making. Several studies have demonstrated that radiomic analysis can characterize coronary atherosclerotic plaques with a level of accuracy comparable, if not superior, to current conventional qualitative and quantitative image analysis. While there are many milestones still to be reached before radiomics can be integrated into current clinical practice, such techniques hold great promise for improving the imaging phenotyping of coronary artery disease.

scholarly journals A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate

2021 ◽  
Vol 11 (2) ◽  
pp. 19
Author(s):  
Francesco Centurelli ◽  
Riccardo Della Sala ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Process ◽  
Slew Rate ◽  
Large Signal ◽  
Output Stage ◽  
Ultra Low Power ◽  
Input Stage ◽  
Rail To Rail

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.

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