scholarly journals New Canonic Active RC Sinusoidal Oscillator Circuits Using Second-Generation Current Conveyors with Application as a Wide-Frequency Digitally Controlled Sinusoid Generator

2011 ◽  
Vol 2011 ◽  
pp. 1-8 ◽  
Author(s):  
Abhirup Lahiri

This paper reports two new circuit topologies using second-generation current conveyors (CCIIs) for realizing variable frequency sinusoidal oscillators with minimum passive components. The proposed topologies in this paper provide new realizations of resistance-controlled and capacitor-controlled variable frequency oscillators (VFOs) using only four passive components. The first topology employs three CCIIs, while the second topology employs two CCIIs. The second topology provides an advantageous feature of frequency tuning through two grounded elements. Application of the proposed circuits as a wide-frequency range digitally controlled sinusoid generator is exhibited wherein the digital frequency control has been enabled by replacing both the capacitors by two identical variable binary capacitor banks tunable by means of the same binary code. SPICE simulations of the CMOS implementation of the oscillators using 0.35 μm TSMC CMOS technology parameters and bipolar implementation of the oscillators using process parameters for NR200N-2X (NPN) and PR200N-2X (PNP) of bipolar arrays ALA400-CBIC-R have validated their workability. One of the oscillators (with CMOS implementation) is exemplified as a digitally controlled sinusoid generator with frequency generation from 25 kHz to 6.36 MHz, achieved by switching capacitors and with power consumption of 7 mW in the entire operating frequency range.

2001 ◽  
Vol 24 (4) ◽  
pp. 233-241 ◽  
Author(s):  
Muhammad Taher Abuelmaatti

A new active-only sinusoidal oscillator is presented. The oscillator circuit uses two internally compensated operational amplifiers, two plus-type second-generation current conveyors and three operational transconductance amplifiers. The proposed circuit enjoys the attractive features of totally uncoupled frequency and condition of oscillation, low sensitivities, electronic tunability and integratability.


2012 ◽  
Vol 2012 ◽  
pp. 1-6 ◽  
Author(s):  
Sudhanshu Maheshwari ◽  
Rishabh Verma

This paper presents a novel electronically tunable third-order sinusoidal oscillator synthesized from a simple topology, employing current-mode blocks. The circuit is realized using the active element: Current Controlled Conveyors (CCCIIs) and grounded passive components. The new circuit enjoys the advantages of noninteractive electronically tunable frequency of oscillation, use of grounded passive components, and the simultaneous availability of three sinusoidal voltage outputs. Bias current generation scheme is given for the active elements used. The circuit exhibits good high frequency performance. Nonideal and parasitic study has also been carried out. Wide range frequency tuning is shown with the bias current. The proposed theory is verified through extensive PSPICE simulations using 0.25 μm CMOS process parameters.


2013 ◽  
Vol 22 (04) ◽  
pp. 1350019 ◽  
Author(s):  
SOLIMAN A. MAHMOUD ◽  
EMAN A. SOLIMAN

In this paper, a digitally programmable OTA-based multi-standard receiver baseband chain is presented. The multi-standard receiver baseband chain consists of two programmable gain amplifiers (PGA1 and PGA2) and a fourth-order LPF. The receiver is suitable for Bluetooth/UMTS/DVB-H/WLAN standards. Three different programmable OTA architectures based on second generation current conveyors (CCIIs) and Current Division Networks (CDNs) are discussed. The programmable OTA with the lowest power consumption, moderate area and good linearity — better than -50 dB HD3 — is selected to realize the multi-standard baseband receiver chain. The power consumption of the receiver chain is 6 mW. The DC gain varies over a 68 dB range with 1 MHz to 13.6 MHz programmable bandwidth. The receiver baseband chain is realized using 90 nm CMOS technology model under ±0.5 V voltage supply.


2010 ◽  
Vol E93-C (7) ◽  
pp. 1007-1013
Author(s):  
Ramesh K. POKHAREL ◽  
Kenta UCHIDA ◽  
Abhishek TOMAR ◽  
Haruichi KANAYA ◽  
Keiji YOSHIDA

2016 ◽  
Vol 26 (02) ◽  
pp. 1750029 ◽  
Author(s):  
Zehra Gulru Cam ◽  
Herman Sedef

In this paper, a new floating analog memristance simulator circuit based on second generation current conveyors and passive elements is proposed. Theoretical derivations are presented which decribe the circuit characteristics. The hardware of proposed simulator circuit is built using commercially available components. Theoretical derivations are validated with PSPICE simulation and experimental results. Performance of circuit was tested with simple example circuits. All results show that proposed simulator circuit provides frequency dependent pinched hysteresis loop and nonvolatility features. Exciting frequency, minimum and maximum memristance values and memristance range can be adjustable with simple passive element values. Simulator circuit has a frequency range of 1[Formula: see text]Hz to 40[Formula: see text]kHz.


2015 ◽  
Vol 24 (03) ◽  
pp. 1550024 ◽  
Author(s):  
Mohammed Aqeeli ◽  
Abdullah Alburaikan ◽  
Cahyo Muvianto ◽  
Xianjun Huang ◽  
Zhirun Hu

A wideband CMOS LC tank voltage-controlled oscillator (VCO) with low phase noise variations and a linearized gain has been designed using a new binary-weighted switched-capacitor and digitally-controlled varactor bank. The novel design has the advantages of more linear VCO frequency tuning, lower phase noise and reduced gain to variations in supply voltage. The proposed VCO has been designed using UMC 90-nm, 6-metal CMOS technology and features phase noise variation of less than 4.9 dBc/Hz. The VCO operates from 3.45 to 6.55 GHz, with phase noise of -133.4 dBc/Hz at a 1 MHz offset, a figure of merit (FoM) of -203.3 dBc/Hz, less than 41 dBm spurious harmonics, and a total VCO core current consumption of 1.18 mA from a 3.3 V voltage supply. To the authors' knowledge, this is the lowest phase noise variation ever reported.


2015 ◽  
Vol 2015 ◽  
pp. 1-7 ◽  
Author(s):  
Hsuan-Ling Kao ◽  
Ping-Che Lee ◽  
Hsien-Chin Chiu

This study describes a wide tuning-range VCO using tunable active inductor (TAI) topology and cross-coupled pair configuration for radio frequency operation. The TAI used two feedback loops to form a cascode circuit to obtain more degrees of freedom for inductance value. The TAI-VCO was fabricated using a 0.18 μm CMOS technology. The coarse frequency tuning is achieved by TAIs while the fine tuning is controlled by varactors. The fabricated circuit provides an output frequency range from 0.6 to 7.2 GHz (169%). The measured phase noise is from −110.38 to −86.01 dBc/Hz at a 1 MHz offset and output power is from −11.11 to −3.89 dBm within the entire frequency range under a 1.8 V power supply.


1995 ◽  
Vol 78 (4) ◽  
pp. 645-651 ◽  
Author(s):  
DONG-SHIUH WU ◽  
SHEN-IUAN LIU ◽  
YUH-SHYAN HWANG ◽  
YAN-PEI WU

2016 ◽  
Vol 26 (02) ◽  
pp. 1750025 ◽  
Author(s):  
Erkan Yuce

In this paper, a new quadrature oscillator employing two dual output second-generation current conveyors (DO-CCIIs), two resistors and two grounded capacitors is proposed. The proposed quadrature oscillator has only resistors but no capacitors connected in series to [Formula: see text] terminals of the DO-CCIIs; thus, it can be operated at high frequencies. It can be tuned electronically by replacing dual output second-generation current controlled current conveyors instead of DO-CCIIs and removing both resistors. It can provide two output currents in opposite sign. Nevertheless, its resonance frequency can be simultaneously controlled by two resistors. Also, a dual output differential voltage current conveyor (DO-DVCC) based quadrature oscillator which employs a canonical number of only grounded passive components is proposed. A number of simulation results based on SPICE program and an experimental test result are included to exhibit performance, workability and effectiveness of the proposed quadrature oscillators.


2017 ◽  
Vol 2017 ◽  
pp. 1-10 ◽  
Author(s):  
Den Satipar ◽  
Pattana Intani ◽  
Winai Jaikla

A new configuration of voltage-mode quadrature sinusoidal oscillator is proposed. The proposed oscillator employs two voltage differencing current conveyors (VDCCs), two resistors, and two grounded capacitors. In this design, the use of multiple/dual output terminal active building block is not required. The tuning of frequency of oscillation (FO) can be done electronically by adjusting the bias current of active device without affecting condition of oscillation (CO). The electronic tuning can be done by controlling the bias current using a digital circuit. The amplitude of two sinusoidal outputs is equal when the frequency of oscillation is tuned. This makes the sinusoidal output voltages meet good total harmonic distortions (THD). Moreover, the proposed circuit can provide the sinusoidal output current with high impedance which is connected to external load or to another circuit without the use of buffer device. To confirm that the oscillator can generate the quadrature sinusoidal output signal, the experimental results using VDCC constructed from commercially available ICs are also included. The experimental results agree well with theoretical anticipation.


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