scholarly journals A Case Study of Self-Checking Circuits Reliability

VLSI Design ◽  
1998 ◽  
Vol 5 (4) ◽  
pp. 373-383 ◽  
Author(s):  
Jien-Chung Lo
Keyword(s):  
Fault Tolerant ◽  
The Self ◽  
Hardware Complexity ◽  
Error Handling ◽  
Fault Tolerant System ◽  
Trade Offs ◽  
Self Testing

In this paper, we analyze the reliability of self-checking circuits. A case study is presented in which a fault-tolerant system with duplicated self-checking modules is compared to the TMR version. It is shown that a duplicated self-checking system has a much higher reliability than that of the TMR counterpart. More importantly, the reliability of the self-checking system does not drop as sharply as that of the TMR version. We also demonstrate the trade-offs between hardware complexity and error handling capability of self-checking circuits. Alternative self-checking designs where some hardware redundancies are removed with the lost of fault-secure and/or self-testing properties are also studied.

scholarly journals TFI-FTS: An efficient transient fault injection and fault-tolerant system for asynchronous circuits on FPGA platform

2021 ◽  
Vol 11 (3) ◽  
pp. 2704
Author(s):  
Sharath Kumar Y. N. ◽  
Dinesha P.
Keyword(s):  
Integrated Circuits ◽  
Digital Circuits ◽  
Fault Tolerant ◽  
Fault Injection ◽  
Asynchronous Circuits ◽  
Fault Coverage ◽  
Asynchronous Circuit ◽  
Hardware Complexity ◽  
Transient Fault ◽  
Fault Tolerant System

Designing VLSI digital circuits is challenging tasks because of testing the circuits concerning design time. The reliability and productivity of digital integrated circuits are primarily affected by the defects in the manufacturing process or systems. If the defects are more in the systems, which leads the fault in the systems. The fault tolerant systems are necessary to overcome the faults in the VLSI digital circuits. In this research article, an asynchronous circuits based an effective transient fault injection (TFI) and fault tolerant system (FTS) are modelled. The TFI system generates the faults based on BMA based LFSR with faulty logic insertion and one hot encoded register. The BMA based LFSR reduces the hardware complexity with less power consumption on-chip than standard LFSR method. The FTS uses triple mode redundancy (TMR) based majority voter logic (MVL) to tolerant the faults for asynchronous circuits. The benchmarked 74X-series circuits are considered as an asynchronous circuit for TMR logic. The TFI-FTS module is modeled using Verilog-HDL on Xilinx-ISE and synthesized on hardware platform. The Performance parameters are tabulated for TFI-FTS based asynchronous circuits. The performance of TFI-FTS Module is analyzed with 100% fault coverage. The fault coverage is validated using functional simulation of each asynchronous circuit with fault injection in TFI-FTS Module.

scholarly journals Using Approximate Computing and Selective Hardening for the Reduction of Overheads in the Design of Radiation-Induced Fault-Tolerant Systems

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1539
Author(s):  
Alexander Aponte-Moreno ◽  
Felipe Restrepo-Calle ◽  
Cesar Pedraza
Keyword(s):  
Fault Tolerant ◽  
Design Method ◽  
Wide Spectrum ◽  
Approximate Computing ◽  
Trade Offs ◽  
Radiation Induced ◽  
Commercial Off The Shelf ◽  
Accuracy Of Results ◽  
Reliability Performance

Fault mitigation techniques based on pure software, known as software-implemented hardware fault tolerance (SIHFT), are very attractive for use in COTS (commercial off-the-shelf) microprocessors because they do not require physical modification of the system. However, these techniques cause software overheads that may affect the efficiency and costs of the overall system. This paper presents a design method of radiation-induced fault-tolerant microprocessor-based systems with lower execution time overheads. For this purpose, approximate computing and selective fault mitigation software-based techniques are used; thus it can be used in COTS devices. The proposal is validated through a case study for the TI MSP430 microcontroller. Results show that the designer can choose among a wide spectrum of design configurations, exploring different trade-offs between reliability, performance, and accuracy of results.

scholarly journals Técnicas de Tolerância a Falhas em uma Plataforma para Prototipagem Rápida Usando Microcontroladores

2019 ◽  
Author(s):  
Kleber Kruger ◽  
Fabio Iaione
Keyword(s):  
Fault Tolerance ◽  
Power Consumption ◽  
Rapid Prototyping ◽  
System Performance ◽  
Processing Time ◽  
Fault Tolerant ◽  
Weather Station ◽  
Fault Tolerant System ◽  
Sram Memory

This paper describes the implementation of fault tolerance techniques (based on data and processing redundancy) in programming of a rapid prototyping platform using microcontrollers. To evaluate performance of these techniques was used a fault injector software and a weather station system as a case study. Experiments simulated faults in sensor readings and faults in SRAM memory regions of the weather station. Finally, the fault-tolerant system performance is presented in comparison with non-fault-tolerant system, considering incidence of failures, processing time, memory and power consumption.

Case study on distributed and fault tolerant system modeling based on timed automata

2009 ◽  
Vol 82 (10) ◽  
pp. 1678-1694 ◽  
Author(s):  
Libor Waszniowski ◽  
Jan Krákora ◽  
Zdeněk Hanzálek
Keyword(s):  
Fault Tolerant ◽  
Timed Automata ◽  
System Modeling ◽  
Fault Tolerant System

AAC Collaboration Using the Self-Anchored Rating Scales (SARS): An Aphasia Case Study

2012 ◽  
Vol 21 (4) ◽  
pp. 136-143
Author(s):  
Lynn E. Fox
Keyword(s):  
Augmentative And Alternative Communication ◽  
Rating Scales ◽  
Rating Scale ◽  
Therapeutic Process ◽  
Family Counseling ◽  
The Self ◽  
Alternative Communication ◽  
Her Family ◽  
Solution Focused

Abstract The self-anchored rating scale (SARS) is a technique that augments collaboration between Augmentative and Alternative Communication (AAC) interventionists, their clients, and their clients' support networks. SARS is a technique used in Solution-Focused Brief Therapy, a branch of systemic family counseling. It has been applied to treating speech and language disorders across the life span, and recent case studies show it has promise for promoting adoption and long-term use of high and low tech AAC. I will describe 2 key principles of solution-focused therapy and present 7 steps in the SARS process that illustrate how clinicians can use the SARS to involve a person with aphasia and his or her family in all aspects of the therapeutic process. I will use a case study to illustrate the SARS process and present outcomes for one individual living with aphasia.

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