scholarly journals Mo-Doped La2O3 as Charge-Trapping Layer for Improved Low-Voltage Flash-Memory Performance

2013 ◽  
Vol 2 (11) ◽  
pp. Q87-Q89 ◽  
Author(s):  
Q. B. Tao ◽  
P. T. Lai
Keyword(s):  
Flash Memory ◽  
Low Voltage ◽  
Memory Performance ◽  
Charge Trapping

High-speed and low-voltage performance in a charge-trapping flash memory using a NiO tunnel junction

2011 ◽  
Vol 44 (15) ◽  
pp. 155105 ◽  
Author(s):  
Yujeong Seo ◽  
Ho-Myoung An ◽  
Hee-Dong Kim ◽  
In Rok Hwang ◽  
Sa Hwan Hong ◽  
...  
Keyword(s):  
Tunnel Junction ◽  
Flash Memory ◽  
High Speed ◽  
Low Voltage ◽  
Charge Trapping ◽  
Voltage Performance ◽  
A Charge

Correction to ZnO/NiO Diode-Based Charge Trapping Layer for Flash Memory Featuring Low Voltage Operation

2015 ◽  
Vol 7 (18) ◽  
pp. 10067-10067
Author(s):  
Chergn-En Sun ◽  
Chin-Yu Chen ◽  
Ka-Lip Chu ◽  
Yung-Shao Shen ◽  
Chia-Chun Lin ◽  
...  
Keyword(s):  
Flash Memory ◽  
Low Voltage ◽  
Charge Trapping ◽  
Low Voltage Operation

ZnO/NiO Diode-Based Charge-Trapping Layer for Flash Memory Featuring Low-Voltage Operation

2015 ◽  
Vol 7 (12) ◽  
pp. 6383-6390 ◽  
Author(s):  
Chergn-En Sun ◽  
Chin-Yu Chen ◽  
Ka-Lip Chu ◽  
Yung-Shao Shen ◽  
Chia-Chun Lin ◽  
...  
Keyword(s):  
Flash Memory ◽  
Low Voltage ◽  
Charge Trapping ◽  
Low Voltage Operation

scholarly journals Flash Memory Featuring Low-Voltage Operation by Crystalline ZrTiO4 Charge-Trapping Layer

2017 ◽  
Vol 7 (1) ◽  
Author(s):  
Yung-Shao Shen ◽  
Kuen-Yi Chen ◽  
Po-Chun Chen ◽  
Teng-Chuan Chen ◽  
Yung-Hsien Wu
Keyword(s):  
Flash Memory ◽  
Low Voltage ◽  
Charge Trapping ◽  
Low Voltage Operation

scholarly journals Physical and Electrical Analysis of Poly-Si Channel Effect on SONOS Flash Memory

Micromachines ◽  
2021 ◽  
Vol 12 (11) ◽  
pp. 1401
Author(s):  
Jun-Kyo Jeong ◽  
Jae-Young Sung ◽  
Woon-San Ko ◽  
Ki-Ryung Nam ◽  
Hi-Deok Lee ◽  
...  
Keyword(s):  
Flash Memory ◽  
Silicon Oxide ◽  
Memory Performance ◽  
Charge Trapping ◽  
Nand Flash ◽  
Nand Flash Memory ◽  
Data Retention ◽  
Threshold Voltage Shift ◽  
Before And After ◽  
Nitride Oxide

In this study, polycrystalline silicon (poly-Si) is applied to silicon-oxide-nitride-oxide-silicon (SONOS) flash memory as a channel material and the physical and electrical characteristics are analyzed. The results show that the surface roughness of silicon nitride as charge trapping layer (CTL) is enlarged with the number of interface traps and the data retention properties are deteriorated in the device with underlying poly-Si channel which can be serious problem in gate-last 3D NAND flash memory architecture. To improve the memory performance, high pressure deuterium (D2) annealing is suggested as a low-temperature process and the program window and threshold voltage shift in data retention mode is compared before and after the D2 annealing. The suggested curing is found to be effective in improving the device reliability.

Flash memory based on solution processed hafnium dioxide charge trapping layer

2014 ◽  
Vol 2 (21) ◽  
pp. 4233-4238 ◽  
Author(s):  
Jiaqing Zhuang ◽  
Su-Ting Han ◽  
Ye Zhou ◽  
V. A. L. Roy
Keyword(s):  
Flash Memory ◽  
Sol Gel ◽  
Charge Trapping ◽  
Hafnium Dioxide ◽  
Solution Processed ◽  
Gel Technique ◽  
A Charge

Hafnium dioxide (HfO2) film prepared by the sol–gel technique has been used as a charge trapping layer in organic flash memory.

Enhanced Programming and Erasing Speeds in P-Channel Charge-Trapping Flash Memory Device With SiGe Buried Channel

2012 ◽  
Vol 33 (9) ◽  
pp. 1264-1266 ◽  
Author(s):  
Li-Jung Liu ◽  
Kuei-Shu Chang-Liao ◽  
Yi-Chuen Jian ◽  
Jen-Wei Cheng ◽  
Tien-Ko Wang ◽  
...  
Keyword(s):  
Flash Memory ◽  
Charge Trapping ◽  
Memory Device ◽  
Buried Channel
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