Board Level Reliability of Solder Joint with a Low CTE PCB

2019 ◽  
Vol 44 (1) ◽  
pp. 975-983 ◽  
Author(s):  
Kyoungmoo Harr ◽  
Chang-Bae Lee ◽  
Yoon-Su Kim ◽  
Seungwook Park ◽  
Jin-Gu Kim ◽  
...  
Keyword(s):  
Solder Joint ◽  
Board Level ◽  
Board Level Reliability

Board Level Reliability Enhancement for A Double-bump Wafer Level Chip Scale Package

2004 ◽  
Vol 1 (2) ◽  
pp. 64-71 ◽  
Author(s):  
Xiaowu Zhang ◽  
E. H. Wong ◽  
Mahadevan K. Iyer
Keyword(s):  
Solder Joint ◽  
Design Guidelines ◽  
Wafer Level ◽  
Element Analysis ◽  
Chip Scale Package ◽  
Form Design ◽  
Parametric Studies ◽  
Reliability Enhancement ◽  
Board Level ◽  
Board Level Reliability

This paper presents a nonlinear finite element analysis on board level solder joint reliability enhancement of a double-bump wafer level chip scale package (CSP). A viscoplastic constitutive relation is adopted for the solders to account for its time and temperature dependence in thermal cycling. The fatigue life of solder joint is estimated by the modified Coffin-Manson equation, which has been verified by experimental results using one of the double-bump wafer level CSP packages as the test vehicle. A series of parametric studies were performed by changing the Sn/Ag inner bump size (UBM pad size and standoff height), the eutectic Sn/Pb external solder joint size (pad size and standoff height), pitch, die thickness, and the encapsulant thickness. The results obtained from the modeling are useful to form design guidelines for board level reliability enhancement of the wafer level CSP packages.

Board Level Reliability of Automotive Grade WLCSP for Radar Applications

2020 ◽  
Author(s):  
Nishant Lakhera ◽  
Burt Carpenter ◽  
Trung Duong ◽  
Mollie Benson ◽  
Andrew J Mawer
Keyword(s):  
Radar Applications ◽  
Board Level ◽  
Board Level Reliability

Board-Level Reliability of Pb-Free Surface Mounted Assemblies during Thermal Shock Testing

2006 ◽  
Vol 15-17 ◽  
pp. 633-638 ◽  
Author(s):  
Jong Woong Kim ◽  
Hyun Suk Chun ◽  
Sang Su Ha ◽  
Jong Hyuck Chae ◽  
Jin Ho Joo ◽  
...  
Keyword(s):  
Thermal Shock ◽  
Solder Joints ◽  
Lead Frame ◽  
Shear Forces ◽  
Microstructural Investigation ◽  
Shock Testing ◽  
Ceramic Capacitor ◽  
Board Level ◽  
Board Level Reliability ◽  
Thermal Shocks

Board-level reliability of conventional Sn-37Pb and Pb-free Sn-3.0Ag-0.5Cu solder joints was evaluated using thermal shock testing. In the microstructural investigation of the solder joints, the formation of Cu6Sn5 intermetallic compound (IMC) layer was observed between both solders and Cu lead frame, but any crack or newly introduced defect cannot be found even after 2000 cycles of thermal shocks. Shear test of the multi layer ceramic capacitor (MLCC) joints were also conducted to investigate the effect of microstructural variations on the bonding strength of the solder joints. Shear forces of the both solder joints decreased with increasing thermal shock cycles. The reason to the decrease in shear force was discussed with fracture surfaces of the shear tested solder joints.

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