Tribological and Kinetical Analysis of Barrier Metal Polishing for Next Generation Copper Interconnects

2019 ◽  
Vol 34 (1) ◽  
pp. 627-632
Author(s):  
Ricardo Duyos Mateo ◽  
Xun Gu ◽  
Takenao Nemoto ◽  
Shigetoshi Sugawa ◽  
Yun Zhuang ◽  
...  
2004 ◽  
Vol 51 (12) ◽  
pp. 2129-2135 ◽  
Author(s):  
T. Saito ◽  
H. Ashihara ◽  
K. Ishikawa ◽  
M. Miyauchi ◽  
Y. Yamada ◽  
...  

2006 ◽  
Author(s):  
K. Higashi ◽  
H. Yamaguchi ◽  
T. Yosho ◽  
A. Sakata ◽  
S. Omoto ◽  
...  

Author(s):  
Richard G. Sartore

In the evaluation of GaAs devices from the MMIC (Monolithic Microwave Integrated Circuits) program for Army applications, there was a requirement to obtain accurate linewidth measurements on the nominal 0.5 micrometer gate lengths used to fabricate these devices. Preliminary measurements indicated a significant variation (typically 10 % to 30% but could be more) in the critical dimensional measurements of the gate length, gate to source distance and gate to drain distance. Passivation introduced a margin of error, which was removed by plasma etching. Additionally, the high aspect ratio (4-5) of the thick gold (Au) conductors also introduced measurement difficulties. The final measurements were performed after the thick gold conductor was removed and only the barrier metal remained, which was approximately 250 nanometer thick platinum on GaAs substrate. The thickness was measured using the penetration voltage method. Linescan of the secondary electron signal as it scans across the gate is shown in Figure 1.


2004 ◽  
Vol 171 (4S) ◽  
pp. 389-389
Author(s):  
Manoj Monga ◽  
Ramakrishna Venkatesh ◽  
Sara Best ◽  
Caroline D. Ames ◽  
Courtney Lee ◽  
...  

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