Shallow Trench Isolation Stress Effect on NMOS Transistor Leakage, SRAM Standby Current and VCCMIN

Jianhua Ju; Eric Liu; Zhaoxu Shen; Allan Zhou; Jinhua Liu; Daniel Deng; Cathy Ren; Susu Wei; Hokmin Ho; Jay Ning

doi:10.1149/1.3096438

Shallow Trench Isolation Stress Effect on NMOS Transistor Leakage, SRAM Standby Current and VCCMIN

ECS Transactions ◽

10.1149/1.3096438 ◽

2019 ◽

Vol 18 (1) ◽

pp. 117-122

Author(s):

Jianhua Ju ◽

Eric Liu ◽

Zhaoxu Shen ◽

Allan Zhou ◽

Jinhua Liu ◽

...

Keyword(s):

Stress Effect ◽

Nmos Transistor ◽

Shallow Trench Isolation ◽

Isolation Stress ◽

Trench Isolation

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Shallow Trench Isolation Stress Effect on 45 Degree Rotated MOSFET Layout

2018 IEEE International Conference on Semiconductor Electronics (ICSE) ◽

10.1109/smelec.2018.8481213 ◽

2018 ◽

Author(s):

Chiew Ching Tan ◽

Philip Beow Yew Tan ◽

M.K. Md Arshad

Keyword(s):

Stress Effect ◽

Shallow Trench Isolation ◽

Isolation Stress ◽

Trench Isolation

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Shallow Trench Isolation stress effect on CMOS transistors with different channel orientations

2016 IEEE International Conference on Semiconductor Electronics (ICSE) ◽

10.1109/smelec.2016.7573633 ◽

2016 ◽

Cited By ~ 2

Author(s):

Chiew Ching Tan ◽

Philip Beow Yew Tan

Keyword(s):

Stress Effect ◽

Shallow Trench Isolation ◽

Isolation Stress ◽

Cmos Transistors ◽

Trench Isolation

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Physical-Based Threshold Voltage and Mobility Models Including Shallow Trench Isolation Stress Effect on nMOSFETs

IEEE Transactions on Nanotechnology ◽

10.1109/tnano.2010.2089468 ◽

2011 ◽

Vol 10 (4) ◽

pp. 875-880 ◽

Cited By ~ 3

Author(s):

Wei Wu ◽

Gang Du ◽

Xiaoyan Liu ◽

Lei Sun ◽

Jinfeng Kang ◽

...

Keyword(s):

Threshold Voltage ◽

Stress Effect ◽

Mobility Models ◽

Shallow Trench Isolation ◽

Isolation Stress ◽

Trench Isolation

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Experimental investigation and physical explanation of shallow trench isolation stress effect in MOSFETs

2017 IEEE Regional Symposium on Micro and Nanoelectronics (RSM) ◽

10.1109/rsm.2017.8069169 ◽

2017 ◽

Cited By ~ 1

Author(s):

Chiew Ching Tan ◽

Philip Beow Yew Tan

Keyword(s):

Experimental Investigation ◽

Stress Effect ◽

Physical Explanation ◽

Shallow Trench Isolation ◽

Isolation Stress ◽

Trench Isolation

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Channel-length dependence of mechanical stress effect by hybrid shallow trench isolation on NBTI degradation of HfSiON/SiO2 p-channel MOSFETs with strained Si/SiGe channel

Microelectronics Reliability ◽

10.1016/j.microrel.2019.113424 ◽

2019 ◽

Vol 100-101 ◽

pp. 113424 ◽

Cited By ~ 1

Author(s):

Hyeokjin Kim ◽

Giyoun Roh ◽

Young-Kyu Kwon ◽

Bongkoo Kang

Keyword(s):

Mechanical Stress ◽

Channel Length ◽

Stress Effect ◽

Strained Si ◽

Shallow Trench Isolation ◽

Length Dependence ◽

Trench Isolation

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Shallow trench isolation stress modification by optimal shallow trench isolation process for sub-65-nm low power complementary metal oxide semiconductor technology

Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics Materials Processing Measurement and Phenomena ◽

10.1116/1.3359612 ◽

2010 ◽

Vol 28 (2) ◽

pp. 391-397 ◽

Cited By ~ 3

Author(s):

Chan-Yuan Hu ◽

Jone F. Chen ◽

Shih-Chih Chen ◽

Shoou-Jinn Chang ◽

Shih-Ming Wang ◽

...

Keyword(s):

Metal Oxide ◽

Low Power ◽

Complementary Metal Oxide Semiconductor ◽

Metal Oxide Semiconductor ◽

Oxide Semiconductor ◽

Semiconductor Technology ◽

Shallow Trench Isolation ◽

Isolation Stress ◽

Trench Isolation

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A comparator energy model considering shallow trench isolation stress by geometric programming

International Symposium on Quality Electronic Design (ISQED) ◽

10.1109/isqed.2013.6523670 ◽

2013 ◽

Author(s):

Gong Chen ◽

Zhang Yu ◽

Bo Yang ◽

Qing Dong ◽

Shigetoshi Nakatake

Keyword(s):

Geometric Programming ◽

Energy Model ◽

Shallow Trench Isolation ◽

Isolation Stress ◽

Trench Isolation

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CMOS shallow trench isolation x-stress effect on channel width for 130nm technology

2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings ◽

10.1109/icsict.2006.306306 ◽

2006 ◽

Cited By ~ 1

Author(s):

Philip Yew Tan ◽

Albert Kordesch ◽

Othman Sidek

Keyword(s):

Channel Width ◽

Stress Effect ◽

Shallow Trench Isolation ◽

Trench Isolation

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CMOS shallow trench isolation x-stress effect on channel width for 0.18μm technology

Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004. ◽

10.1109/icsict.2004.1435016 ◽

2005 ◽

Cited By ~ 2

Author(s):

P.B.Y. Tan ◽

A.V. Kordesch ◽

O. Sidek

Keyword(s):

Channel Width ◽

Stress Effect ◽

Shallow Trench Isolation ◽

Trench Isolation

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Strained CMOS Devices With Shallow-Trench-Isolation Stress Buffer Layers

IEEE Transactions on Electron Devices ◽

10.1109/ted.2008.916708 ◽

2008 ◽

Vol 55 (4) ◽

pp. 1085-1089 ◽

Cited By ~ 32

Author(s):

Yiming Li ◽

Hung-Ming Chen ◽

Shao-Ming Yu ◽

Jiunn-Ren Hwang ◽

Fu-Liang Yang

Keyword(s):

Buffer Layers ◽

Shallow Trench Isolation ◽

Isolation Stress ◽

Trench Isolation ◽

Stress Buffer

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