Analysis of Silicon Dioxde Nanowires Synthesized via Rapid Thermal Annealing of Pt-coated Si Substrates

2019 ◽  
Vol 13 (9) ◽  
pp. 1-6
Author(s):  
Yi-Sheng Lai ◽  
Jyh-Liang Wang ◽  
Sz-Chian Liou
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Si Substrates

Defect Reduction in GaAs Epilayers on Si Substrates Using Strained Layer Superlattices

1987 ◽  
Vol 91 ◽  
Author(s):  
N. El-Masry ◽  
N. Hamaguchi ◽  
J.C.L. Tarn ◽  
N. Karam ◽  
T.P. Humphreys ◽  
...  
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Buffer Layers ◽  
Threading Dislocations ◽  
Defect Reduction ◽  
Strained Layer ◽  
Si Substrates ◽  
Density Of Dislocations ◽  
Strained Layer Superlattice ◽  
Strained Layer Superlattices

ABSTRACTInxGa11-xAs-GaAsl-yPy strained layer superlattice buffer layers have been used to reduce threading dislocations in GaAs grown on Si substrates. However, for an initially high density of dislocations, the strained layer superlattice is not an effective filtering system. Consequently, the emergence of dislocations from the SLS propagate upwards into the GaAs epilayer. However, by employing thermal annealing or rapid thermal annealing, the number of dislocation impinging on the SLS can be significantly reduced. Indeed, this treatment greatly enhances the efficiency and usefulness of the SLS in reducing the number of threading dislocations.

scholarly journals Synthesis of Ge1−xSnx Alloy Thin Films by Rapid Thermal Annealing of Sputtered Ge/Sn/Ge Layers on Si Substrates

Materials ◽  
2018 ◽  
Vol 11 (11) ◽  
pp. 2248 ◽  
Author(s):  
Hadi Mahmodi ◽  
Md Hashim ◽  
Tetsuo Soga ◽  
Salman Alrokayan ◽  
Haseeb Khan ◽  
...  
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Near Infrared ◽  
Annealing Temperature ◽  
Solid Phase ◽  
Infrared Region ◽  
Alloy Formation ◽  
Phase Mixing ◽  
Si Substrates ◽  
Msm Photodetector

In this work, nanocrystalline Ge1−xSnx alloy formation from a rapid thermal annealed Ge/Sn/Ge multilayer has been presented. The multilayer was magnetron sputtered onto the Silicon substrate. This was followed by annealing the layers by rapid thermal annealing, at temperatures of 300 °C, 350 °C, 400 °C, and 450 °C, for 10 s. Then, the effect of thermal annealing on the morphological, structural, and optical characteristics of the synthesized Ge1−xSnx alloys were investigated. The nanocrystalline Ge1−xSnx formation was revealed by high-resolution X-ray diffraction (HR-XRD) measurements, which showed the orientation of (111). Raman results showed that phonon intensities of the Ge-Ge vibrations were improved with an increase in the annealing temperature. The results evidently showed that raising the annealing temperature led to improvements in the crystalline quality of the layers. It was demonstrated that Ge-Sn solid-phase mixing had occurred at a low temperature of 400 °C, which led to the creation of a Ge1−xSnx alloy. In addition, spectral photo-responsivity of a fabricated Ge1−xSnx metal-semiconductor-metal (MSM) photodetector exhibited its extending wavelength into the near-infrared region (820 nm).

Chemical structure and electrical properties of sputtered HfO2 films on Si substrates annealed by rapid thermal annealing

Vacuum ◽  
2009 ◽  
Vol 83 (9) ◽  
pp. 1155-1158 ◽  
Author(s):  
Tingting Tan ◽  
Zhengtang Liu ◽  
Hongcheng Lu ◽  
Wenting Liu ◽  
Feng Yan
Keyword(s):  
Electrical Properties ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Chemical Structure ◽  
Si Substrates

Cathodoluminescence Studies of Si-Sio2 Interfaces Prepared by Plasma-Assisted Oxidation and Subjected to Post-Oxidation Rapid Thermal Annealing

1998 ◽  
Vol 525 ◽  
Author(s):  
J. Schafer ◽  
A. P. Young ◽  
L. J. Brillson ◽  
H. Niimi ◽  
G. Lucovsky
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Oxygen Vacancies ◽  
Plasma Deposition ◽  
Film Surface ◽  
Low Temperature Plasma ◽  
Temperature Plasma ◽  
Si Substrates ◽  
Local Bonding ◽  
Processing Steps

ABSTRACTWe have used low energy cathodolumrdinescence spectroscopy (CLS) to characterize defects at ultrathin (50 Å) silicon dioxide films, prepared on Si substrates by low-temperature plasma deposition. Variable-depth excitation with different electron injection energies provided a clear distinction between deep levels localized within the films versus at their interfaces. Defect bands are evident at 0.8 eV and 1.9 eV, characteristic of an amorphous, silicon-rich local bonding environment. Closer to the film surface, CLS reveals a defect at 2.7 eV indicative of oxygen vacancies in stoichiometric SiO2. The effect of hydrogenation at 400°C, rapid thermal annealing at 900°C, and especially the combination of both processing steps is shown to reduce the density of these defects dramatically.

Comparison of the GaAs Layers Grown on Porous Si and on Si by Molecular Beam Epitaxy

1989 ◽  
Vol 145 ◽  
Author(s):  
B.J. Wu ◽  
K.L. Wang ◽  
Y.J. Mii ◽  
Y.S. Yoon ◽  
A.T. Wu ◽  
...  
Keyword(s):  
Residual Stress ◽  
Molecular Beam Epitaxy ◽  
Dislocation Density ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Molecular Beam ◽  
Porous Si ◽  
Si Substrate ◽  
Si Substrates

AbstractGaAs layers have been successfully grown on tilted (100) Si as well as porous Si substrates by molecular beam epitaxy(MBE). Rapid thermal annealing and vacuum thermal annealing have been used to further improve the quality of the epitaxial layers. We observed that the dislocation density near the interface of the heterostructure is higher for GaAs on Si substrate. Both annealing processes are proven to be useful in improving layer quality, while the vacuum thermal annealing seemed to be more effective in minimizing the residual stress.

Improvement of Ferroelectric and Electrical Properties of Sol-Gel deposited Bi4Ti3Oi2 Thin Films by Multiple Rapid Thermal Annealing Techniques

2004 ◽  
Vol 830 ◽  
Author(s):  
Hua. Wang ◽  
Minfang Ren
Keyword(s):  
Thin Films ◽  
Grain Size ◽  
Electrical Properties ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Annealing Temperature ◽  
Sol Gel ◽  
Annealing Temperature Increase ◽  
Si Substrates ◽  
Surface Increase

AbstractFerroelectric Bi4Ti3O12 thin films were fabricated by sol-gel method with multiple rapid thermal annealing (MRTA) techniques on Pt/Ti/SiO2/p-Si substrates. The effect of annealing temperature on crystallinity, ferroelectric and electrical properties of Bi4Ti3O12 films derived by MRTA and by normal RTA were investigated. The results reveal that the grain size and the roughness of surface increase with the annealing temperature increase, but the maximal remnant polarization of Bi4Ti3O12

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