scholarly journals Synthesis of Ge1−xSnx Alloy Thin Films by Rapid Thermal Annealing of Sputtered Ge/Sn/Ge Layers on Si Substrates

Materials ◽  
2018 ◽  
Vol 11 (11) ◽  
pp. 2248 ◽  
Author(s):  
Hadi Mahmodi ◽  
Md Hashim ◽  
Tetsuo Soga ◽  
Salman Alrokayan ◽  
Haseeb Khan ◽  
...  

In this work, nanocrystalline Ge1−xSnx alloy formation from a rapid thermal annealed Ge/Sn/Ge multilayer has been presented. The multilayer was magnetron sputtered onto the Silicon substrate. This was followed by annealing the layers by rapid thermal annealing, at temperatures of 300 °C, 350 °C, 400 °C, and 450 °C, for 10 s. Then, the effect of thermal annealing on the morphological, structural, and optical characteristics of the synthesized Ge1−xSnx alloys were investigated. The nanocrystalline Ge1−xSnx formation was revealed by high-resolution X-ray diffraction (HR-XRD) measurements, which showed the orientation of (111). Raman results showed that phonon intensities of the Ge-Ge vibrations were improved with an increase in the annealing temperature. The results evidently showed that raising the annealing temperature led to improvements in the crystalline quality of the layers. It was demonstrated that Ge-Sn solid-phase mixing had occurred at a low temperature of 400 °C, which led to the creation of a Ge1−xSnx alloy. In addition, spectral photo-responsivity of a fabricated Ge1−xSnx metal-semiconductor-metal (MSM) photodetector exhibited its extending wavelength into the near-infrared region (820 nm).

1996 ◽  
Vol 424 ◽  
Author(s):  
Reece Kingi ◽  
Yaozu Wang ◽  
Stephen J. Fonash ◽  
Osama Awadelkarim ◽  
John Mehlhaff

AbstractRapid thermal annealing and furnace annealing for the solid phase crystallization of amorphous silicon thin films deposited using PECVD from argon diluted silane have been compared. Results reveal that the crystallization time, the growth time, and the transient time are temperature activated, and that the resulting polycrystalline silicon grain size is inversely proportional to the annealing temperature, for both furnace annealing and rapid thermal annealing. In addition, rapid thermal annealing was found to result in a lower transient time, a lower growth time, a lower crystallization time, and smaller grain sizes than furnace annealing, for a given annealing temperature. Interestingly, the transient time, growth time, and crystallization time activation energies are much lower for rapid thermal annealing, compared to furnace annealing.We propose two models to explain the observed differences between rapid thermal annealing and furnace annealing.


2004 ◽  
Vol 830 ◽  
Author(s):  
Hua. Wang ◽  
Minfang Ren

AbstractFerroelectric Bi4Ti3O12 thin films were fabricated by sol-gel method with multiple rapid thermal annealing (MRTA) techniques on Pt/Ti/SiO2/p-Si substrates. The effect of annealing temperature on crystallinity, ferroelectric and electrical properties of Bi4Ti3O12 films derived by MRTA and by normal RTA were investigated. The results reveal that the grain size and the roughness of surface increase with the annealing temperature increase, but the maximal remnant polarization of Bi4Ti3O12


2007 ◽  
Vol 2 (2) ◽  
pp. 85-88
Author(s):  
Ricardo L. Ohta ◽  
Carlos E. Viana ◽  
Nilton I. Morimoto ◽  
Ben-Hur V. Borges

The electrical properties of Ti-Si-Ti Metal-Semiconductor-Metal (MSM) photodetector were studied as a function of annealing temperature, using Rapid Thermal Annealing (RTA) process. Low temperatures were used at the RTA (200-350°C) in order to avoid the formation of silicides.We observed a decrease in the dark current on samples annealed between 200 and 300°C. The lowest dark current was obtained in the sample annealed at 250°C (4.8 nA), which is one order of magnitude lower than as-deposited sample (53.5 nA). The sample annealed at 350°C had an increase in dark current (82.9 nA). This behavior of the dark current can be explained by the increase in the barrier height at 200-300°C annealing temperature range, due to increase of the thickness of the amorphous interdiffused Ti-Si interfacial layer, and decrease in the barrier value at sample annealed at 350°C, due to pre formation of C49 TiSi2.


1987 ◽  
Vol 91 ◽  
Author(s):  
N. El-Masry ◽  
N. Hamaguchi ◽  
J.C.L. Tarn ◽  
N. Karam ◽  
T.P. Humphreys ◽  
...  

ABSTRACTInxGa11-xAs-GaAsl-yPy strained layer superlattice buffer layers have been used to reduce threading dislocations in GaAs grown on Si substrates. However, for an initially high density of dislocations, the strained layer superlattice is not an effective filtering system. Consequently, the emergence of dislocations from the SLS propagate upwards into the GaAs epilayer. However, by employing thermal annealing or rapid thermal annealing, the number of dislocation impinging on the SLS can be significantly reduced. Indeed, this treatment greatly enhances the efficiency and usefulness of the SLS in reducing the number of threading dislocations.


2011 ◽  
Vol 1321 ◽  
Author(s):  
A. Kumar ◽  
P.I. Widenborg ◽  
H. Hidayat ◽  
Qiu Zixuan ◽  
A.G. Aberle

ABSTRACTThe effect of the rapid thermal annealing (RTA) and hydrogenation step on the electronic properties of the n+ and p+ solid phase crystallized (SPC) poly-crystalline silicon (poly-Si) thin films was investigated using Hall effect measurements and four-point-probe measurements. Both the RTA and hydrogenation step were found to affect the electronic properties of doped poly-Si thin films. The RTA step was found to have the largest impact on the dopant activation and majority carrier mobility of the p+ SPC poly-Si thin films. A very high Hall mobility of 71 cm2/Vs for n+ poly-Si and 35 cm2/Vs for p+ poly-Si at the carrier concentration of 2×1019 cm-3 and 4.5×1019 cm-3, respectively, were obtained.


2007 ◽  
Vol 124-126 ◽  
pp. 447-450 ◽  
Author(s):  
Hyoung June Kim

Polycrystalline Si thin film transistors (TFTs) have been fabricated through solid phase crystallization using field-enhanced rapid thermal annealing (FE-RTA) system. The system consists of inline furnace modules for preheating and cooling of the glass substrates and a process module for rapid radiative heating combined with alternating magnetic field induction. The FE-RTA system enables crystallization of amorphous Si at high throughputs without any glass damages. While the typical grain structures of poly-Si by FE-RTA are similar to those of solid phase crystallization, the residual amorphous Si and intragranular defects are reduced.


1991 ◽  
Vol 69 (3-4) ◽  
pp. 451-455 ◽  
Author(s):  
H. Lafontaine ◽  
J. F. Currie ◽  
S. Boily ◽  
M. Chaker ◽  
H. Pépin

Tungsten thin films are deposited with a triode sputtering system in order to obtain an absorbing layer for X-ray masks. The mechanical stress is studied as a function of different pressure and RF power conditions during deposition. Rapid thermal annealing at different temperatures and durations is performed in order to produce films under low compressive stress. We observe that the stress changes occur over the time scale of seconds at the annealing temperature and that the corresponding activation energies are low (60 meV). Grain growth in a preferred orientation explains the observed changes in stress. The magnitude in the change of stress is in good agreement with a model proposed by Hoffman et al. relating the stress to grain size and grain boundary dimensions. [Journal translation]


1987 ◽  
Vol 103 ◽  
Author(s):  
Menachem Nathan

ABSTRACTA general scheme for determining which metal-Si systems undergo solidphase amorphization (SPA) upon rapid thermal annealing is presented and used to investigate Ni-Si, Ti-Si, V-Si, Co-Si and Cr-Si reactions. SPA occurs only in the first three systems. With the glaring exception of Co-Si, the results agree with the thermodynamic predictions of SPA in systems in which the free energy of a glassy phase is significantly lower than the free energy of the separate components. The amorphization may also be influenced by the diffusing species and contamination. Following SPA, the first crystalline compound is determined by nucleation kinetics.


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