Influence of AsH[sub 3], PH[sub 3],and B[sub 2]H[sub 6] on the Growth Rate and Resistivity of Polycrystalline Silicon Films Deposited from a SiH[sub 4]-H[sub 2] Mixture

1973 ◽  
Vol 120 (1) ◽  
pp. 106 ◽  
Author(s):  
F. C. Eversteyn ◽  
B. H. Put
Keyword(s):  
Growth Rate ◽  
Polycrystalline Silicon ◽  
Silicon Films ◽  
Polycrystalline Silicon Films

Grain Growth Processes during Transient Annealing of As-Implanted, Polycrystalline-Silicon Films

1984 ◽  
Vol 35 ◽  
Author(s):  
S.J. Krause ◽  
S.R. Wilson ◽  
W.M. Paulson ◽  
R.B. Gregory
Keyword(s):  
Growth Rate ◽  
Grain Size ◽  
Grain Growth ◽  
Polycrystalline Silicon ◽  
Average Diameter ◽  
Silicon Films ◽  
Growth Processes ◽  
Cross Sectional ◽  
Polycrystalline Silicon Films ◽  
Equiaxed Grains

ABSTRACTPolycrystalline silicon films of 300 nm thickness were deposited on oxidized wafer surfaces, implanted with As, and annealed on a Varian IA 200 rapid thermal annealer. Transmission electron microscopy was used to study through-thickness and cross sectional views of grain size and morphology of as-deposited and of transient annealed films. A bimoda] distribution of grain sizes was present in as-deposited polycrystalline silicon films. The first population was due to columnar growth of some grains to a final average diameter of 20 rm. The second population of small equiaxed grains of 5 nm average diameter were formed early in the deposition process. During transient annealing grains in the first population grew rapidly up to 280-nm equiaxed grains. After this the growth rate decreased due to the grain size reaching the thickness of the film. Grains in the second population grew rapidly up to a size of 150 nm, after which the growth rate was lowered due to grains impinging upon one another. The grain growth processes for both populations have been described with a modified model for interfacially driven grain growth. This model accounts for diffusion and grain growth which occur with rapidly rising and falling temperatures during short annealing times characteristic of transient annealing processes.

Hydrogen Dilution Effect on the Crystallinity of Silicon Films Grow by Hot Wire Cell Method

1999 ◽  
Vol 557 ◽  
Author(s):  
M. Ichikawa ◽  
J. Takeshita ◽  
A. Yamada ◽  
M. Konagai
Keyword(s):  
Thin Films ◽  
Growth Rate ◽  
Polycrystalline Silicon ◽  
High Growth ◽  
Silicon Films ◽  
Hot Wire ◽  
Cell Method ◽  
Silicon Thin Films ◽  
Hydrogen Dilution ◽  
Polycrystalline Silicon Films

AbstractA new process, the Hot Wire Cell method, was developed and successfully used to grow polycrystalline silicon thin films at a low temperature and high growth rate. In the Hot Wire Cell method, reactant gases are decomposed as a result of reacting with a heated tungsten filament placed near to a substrate and polycrystalline silicon films can be deposited at a growth rate of 1.2nm/s without hydrogen dilution and 0.9nm/s with the use hydrogen dilution. The film crystallinity changed from amorphous to polycrystalline due to the addition of hydrogen, thus hydrogen dilution was effective for improving film crystallinity. Furthermore, we obtained (220) oriented polycrystalline silicon thin films with a 90% crystal fraction by the use of hydrogen dilution. These results showed that the Hot Wire Cell method is promising for the deposition of device-grade polycrystalline silicon films for photovoltaic applications.

Interface morphology of thermal oxide grown on polycrystalline silicon by different processes

1992 ◽  
Vol 50 (2) ◽  
pp. 1396-1397
Author(s):  
H. Yen ◽  
E. P. Kvam ◽  
R. Bashir ◽  
S. Venkatesan ◽  
G. W. Neudeck
Keyword(s):  
Integrated Circuits ◽  
Polycrystalline Silicon ◽  
Silicon Films ◽  
Interface Morphology ◽  
Oxide Interface ◽  
Poly Silicon ◽  
Thermal Oxide ◽  
Grain Orientations ◽  
Polycrystalline Silicon Films ◽  
P Type

Polycrystalline silicon, when highly doped, is commonly used in microelectronics applications such as gates and interconnects. The packing density of integrated circuits can be enhanced by fabricating multilevel polycrystalline silicon films separated by insulating SiO2 layers. It has been found that device performance and electrical properties are strongly affected by the interface morphology between polycrystalline silicon and SiO2. As a thermal oxide layer is grown, the poly silicon is consumed, and there is a volume expansion of the oxide relative to the atomic silicon. Roughness at the poly silicon/thermal oxide interface can be severely deleterious due to stresses induced by the volume change during oxidation. Further, grain orientations and grain boundaries may alter oxidation kinetics, which will also affect roughness, and thus stress.Three groups of polycrystalline silicon films were deposited by LPCVD after growing thermal oxide on p-type wafers. The films were doped with phosphorus or arsenic by three different methods.

Structure of Annealed Polycrystalline Silicon Films. I. Recrystallization

1986 ◽  
Vol 98 (2) ◽  
pp. 383-390 ◽  
Author(s):  
F. L. Edelman ◽  
J. Heydenreich ◽  
D. Hoehl ◽  
J. Matthäi ◽  
I. Melnik ◽  
...  
Keyword(s):  
Polycrystalline Silicon ◽  
Silicon Films ◽  
Polycrystalline Silicon Films

Stresses in thin polycrystalline silicon films

1988 ◽  
Vol 162 ◽  
pp. 365-374 ◽  
Author(s):  
V.M. Koleshko ◽  
V.F. Belitsky ◽  
I.V. Kiryushin
Keyword(s):  
Polycrystalline Silicon ◽  
Silicon Films ◽  
Thin Polycrystalline ◽  
Polycrystalline Silicon Films

Fast and non-destructive assessment of epitaxial quality of polycrystalline silicon films on glass by optical measurements

2004 ◽  
Vol 265 (1-2) ◽  
pp. 168-173 ◽  
Author(s):  
Axel Straub ◽  
Per I. Widenborg ◽  
Alistair Sproul ◽  
Yidan Huang ◽  
Nils-Peter Harder ◽  
...  
Keyword(s):  
Polycrystalline Silicon ◽  
Silicon Films ◽  
Optical Measurements ◽  
Polycrystalline Silicon Films ◽  
Non Destructive
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