Simultaneous Silicon Wafer Temperature and Oxide Film Thickness Measurement in Rapid‐Thermal Processing Using Ellipsometry

1993 ◽  
Vol 140 (6) ◽  
pp. 1734-1743 ◽  
Author(s):  
R. K. Sampson ◽  
K. A. Conrad ◽  
E. A. Irene ◽  
H. Z. Massoud
1962 ◽  
Vol 33 (9) ◽  
pp. 2909-2909 ◽  
Author(s):  
H. M. Robertson ◽  
J. E. McNamara ◽  
R. M. Warner

Doklady BGUIR ◽  
2020 ◽  
Vol 18 (7) ◽  
pp. 79-86
Author(s):  
J. A. Solovjov ◽  
V. A. Pilipenko ◽  
V. P. Yakovlev

The present work is devoted to determination of the dependence of the heating temperature of the silicon wafer on the lamps power and the heating time during rapid thermal processing using “UBTO 1801” unit by irradiating the wafer backside with an incoherent flow of constant density light. As a result, a mathematical model of silicon wafer temperature variation was developed on the basis of the equation of nonstationary thermal conductivity and known temperature dependencies of the thermophysical properties of silicon and the emissivity of aluminum and silver applied to the planar surface of the silicon wafer. For experimental determination of the numerical parameters of the mathematical model, silicon wafers were heated with light single pulse of constant power to the temperature of one of three phase transitions such as aluminum-silicon eutectic formation, aluminum melting and silver melting. The time of phase transition formation on the wafer surface during rapid thermal processing was fixed by pyrometric method. In accordance with the developed mathematical model, we determined the conversion coefficient of the lamps electric power to the light flux power density with the numerical value of 5.16∙10-3 cm-2 . Increasing the lamps power from 690 to 2740 W leads to an increase in the silicon wafer temperature during rapid thermal processing from 550°to 930°K, respectively. With that, the wafer temperature prediction error in compliance with developed mathematical model makes less than 2.3 %. The work results can be used when developing new procedures of rapid thermal processing for silicon wafers.


2020 ◽  
Vol 91 (12) ◽  
pp. 123111
Author(s):  
Zirui Qin ◽  
Qinggang Liu ◽  
Chong Yue ◽  
Yaopu Lang ◽  
Xinglin Zhou

2021 ◽  
Vol 118 (21) ◽  
pp. 212101
Author(s):  
Alena Nikolskaya ◽  
Alexey Belov ◽  
Alexey Mikhaylov ◽  
Anton Konakov ◽  
David Tetelbaum ◽  
...  

1991 ◽  
Vol 226 ◽  
Author(s):  
Hideo Miura ◽  
Hiroshi Sakata ◽  
Shinji Sakata Merl

AbstractThe residual stress in silicon substrates after local thermal oxidation is discussed experimentally using microscopic Raman spectroscopy. The stress distribution in the silicon substrate is determined by three main factors: volume expansion of newly grown silicon–dioxide, deflection of the silicon–nitride film used as an oxidation barrier, and mismatch in thermal expansion coefficients between silicon and silicon dioxide.Tensile stress increases with the increase of oxide film thickness near the surface of the silicon substrate under the oxide film without nitride film on it. The tensile stress is sometimes more than 100 MPa. On the other hand, a complicated stress change is observed near the surface of the silicon substrate under the nitride film. The tensile stress increases initially, as it does in the area without nitride film on it. However, it decreases with the increase of oxide film thickness, then the compressive stress increases in the area up to 170 MPa. This stress change is explained by considering the drastic structural change of the oxide film under the nitride film edge during oxidation.


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