Selective Titanium Silicide Chemical Vapor Deposition with Surface Cleaning by Silane and Ohmic Contact Formation to Very Shallow Junctions

1993 ◽  
Vol 140 (2) ◽  
pp. 513-518 ◽  
Author(s):  
Kunio Saito ◽  
Takao Amazawa ◽  
Yoshinobu Arita
Keyword(s):  
Chemical Vapor Deposition ◽  
Ohmic Contact ◽  
Vapor Deposition ◽  
Chemical Vapor ◽  
Surface Cleaning ◽  
Titanium Silicide ◽  
Contact Formation ◽  
Shallow Junctions ◽  
Ohmic Contact Formation

Effects of Arsenic Doping on Chemical Vapor Deposition of Titanium Silicide

1999 ◽  
Vol 146 (11) ◽  
pp. 4240-4245 ◽  
Author(s):  
Hua Fang ◽  
Mehmet C. Öztürk ◽  
E. G. Seebauer ◽  
Dale E. Batchelor
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Chemical Vapor ◽  
Titanium Silicide ◽  
Arsenic Doping

Selective Rapid Thermal Chemical Vapor Deposition of Titanium Silicide on Arsenic Implanted Silicon

1998 ◽  
Vol 514 ◽  
Author(s):  
Hua Fang ◽  
Mehmet C. Özttirk ◽  
Edmund G. Seebauer
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Silicon Substrate ◽  
Chemical Vapor ◽  
Silicon Wafers ◽  
Titanium Silicide ◽  
Experimental Results ◽  
Substrate Consumption ◽  
Thermal Chemical Vapor Deposition ◽  
Dose Levels

ABSTRACTThis work explores the effects of arsenic on rapid thermal chemical vapor deposition (RTCVD) of TiSi2. The films were deposited using TiCI4 and SiH4 on 100 mm oxide patterned silicon wafers selectively at temperatures ranging from 750°C to 850°C. Arsenic dose levels ranging from 3×1014 cm−2 to 5*times;1015 cm−2 at 50 keV were considered. Experimental results reveal that arsenic results in a resistance to TiSi2 nucleation and enhanced silicon substrate consumption. These effects are enhanced at higher arsenic dose levels and reduced at higher deposition temperatures. We propose an arsenic-surfacepassivation model to explain the effects.

Surface Cleaning Prior to Formation of Si/SiO2 Interfaces by Remote Plasma-Enhanced Chemical Vapor Deposition (RPECVD)

1992 ◽  
Vol 259 ◽  
Author(s):  
H. H. Lamb ◽  
S. Kalem ◽  
S. Bedge ◽  
T. Yasuda ◽  
Y. Ma ◽  
...  
Keyword(s):  
Chemical Vapor Deposition ◽  
Oxide Layer ◽  
Vapor Deposition ◽  
Chemical Vapor ◽  
Surface Cleaning ◽  
Ex Situ ◽  
Dangling Bond ◽  
Remote Plasma ◽  
Carbon Contamination

ABSTRACTEx situ UV/O2 cleaning prior to SiO2 deposition by RPECVD results in an SiO2/Si interface with mid-gap Dit values 2-5 times higher than interfaces formed by in situ exposure of HF-etched wafers to plasma-generated atomic O. In situ exposures to plasma-generated atomic H and atomic O are each effective at removing carbon contamination acquired by the UV/O2 cleaned wafers during transfer and introduction to the RPECVD chamber. However, in situ exposure of the photochemical oxide layer to atomic O results in higher mid-gap Dit values, and in situ exposure to atomic H results in creation of dangling bond defects (Pb centers).

Influence of Surface Pre-Cleaning on Electrical Properties of Rapid Thermal Oxide and Rapid Thermal Chemical Vapor Deposition Oxide

1992 ◽  
Vol 259 ◽  
Author(s):  
Xiaoli Xu ◽  
R. T. Kuehn ◽  
J. M. Melzak ◽  
G. A. Hames ◽  
J. J. Wortman ◽  
...  
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
High Vacuum ◽  
Chemical Vapor ◽  
Thermally Grown Oxide ◽  
Surface Cleaning ◽  
Breakdown Field ◽  
Wafer Surface ◽  
Thermal Chemical Vapor Deposition ◽  
Thermal Oxide

ABSTRACTVarious surface pre-cleaning processes for rapid thermal in-situ polysilicon/oxide/silicon stacked gate formation have been evaluated. MOS capacitors have been fabricated to assess the effects of surface pre-cleaning on the quality of both Rapid Thermal Oxide (RTO) and Rapid Thermal Chemical Vapor Deposition (RTCVD) oxide. Measurement results have shown that, 1) High temperature (≥ 900 °C) rapid thermal cleaning in Ar, H2 or high vacuum (10−8 Torr) ambients can lead to MOS gates with high leakage current if RTO is used to form the gate oxide, 2) The standard Huang clean and ultra-violet ozone (UV/O3) treatments can improve the film quality for both deposited and thermally grown oxide, and 3) Compared with RTO, the breakdown field of the RTCVD oxide is less dependent on the surface pre-cleaning treatment. These results indicate that silicon wafer surface cleaning techniques typically used for silicon epitaxial processes are not necessarily applicable to oxide film formation in RTP reactors.

The Effect of Surface Cleaning by Wet Treatments and Ultra High Vacuum Annealing for Ohmic Contact Formation of P-Type GaN

2000 ◽  
Vol 39 (Part 1, No. 7B) ◽  
pp. 4451-4455 ◽  
Author(s):  
Ichitaro Waki ◽  
Hiroshi Fujioka ◽  
Kanta Ono ◽  
Masaharu Oshima ◽  
Hisayuki Miki ◽  
...  
Keyword(s):  
Ohmic Contact ◽  
Vacuum Annealing ◽  
High Vacuum ◽  
Surface Cleaning ◽  
Ultra High Vacuum ◽  
Contact Formation ◽  
P Type ◽  
Ohmic Contact Formation ◽  
Effect Of Surface
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