Correlation of 150 mm P/P+ Epitaxial Silicon Wafer Flatness Parameters for Deep Submicron Applications

1993 ◽  
Vol 140 (1) ◽  
pp. 229-241 ◽  
Author(s):  
H. R. Huff ◽  
G. H. Popham ◽  
R. W. Potter
Keyword(s):  
Silicon Wafer ◽  
Deep Submicron ◽  
Epitaxial Silicon

Observations of Defect Generation at Stacking Faults in Boron Diffused and Oxidized Silicon Films

1973 ◽  
Vol 31 ◽  
pp. 128-129 ◽  
Author(s):  
A. G. Cullis ◽  
D. M. Maher ◽  
C. M. Hsieh
Keyword(s):  
Electron Microscope ◽  
Oxide Layer ◽  
Silicon Wafer ◽  
Transmission Electron Microscope ◽  
Defect Formation ◽  
Stacking Faults ◽  
Epitaxial Silicon ◽  
Partial Dislocations ◽  
Substrate Side ◽  
Transmission Electron

Recently, the transmission electron microscope (TEM) has been used to study the formation and geometry of defect colonies in annealed and quenched silicon and in thermally oxidized and boron diffused silicon. The purpose of the present study was to examine subsidiary defect formation which can occur during the climb of Frank partial dislocations bounding stacking faults in boron diffused and subsequently thermally oxidized silicon. In these experiments, a {001} epitaxial silicon wafer (n-type, 1Ω−cm) was boron diffused (to 5×1018/cm3), and then steam oxidized for 2 hr at 1050°C. Prior to oxidation the wafer was cleaned using HF as a last step. After oxidation the oxide layer was first removed and then specimens from the wafer were chemically thinned from the substrate side for TEM observations (200 kV).

scholarly journals Reduction of Dark Current in CMOS Image Sensor Pixels Using Hydrocarbon-Molecular-Ion-Implanted Double Epitaxial Si Wafers

Sensors ◽  
2020 ◽  
Vol 20 (22) ◽  
pp. 6620
Author(s):  
Ayumi Onaka-Masada ◽  
Takeshi Kadono ◽  
Ryosuke Okuyama ◽  
Ryo Hirose ◽  
Koji Kobayashi ◽  
...  
Keyword(s):  
Silicon Wafer ◽  
Oxygen Concentration ◽  
Epitaxial Layer ◽  
Dark Current ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Device Fabrication ◽  
White Spot ◽  
Epitaxial Silicon ◽  
Ion Implanted

The impact of hydrocarbon-molecular (C3H6)-ion implantation in an epitaxial layer, which has low oxygen concentration, on the dark characteristics of complementary metal-oxide-semiconductor (CMOS) image sensor pixels was investigated by dark current spectroscopy. It was demonstrated that white spot defects of CMOS image sensor pixels when using a double epitaxial silicon wafer with C3H6-ion implanted in the first epitaxial layer were 40% lower than that when using an epitaxial silicon wafer with C3H6-ion implanted in the Czochralski-grown silicon substrate. This considerable reduction in white spot defects on the C3H6-ion-implanted double epitaxial silicon wafer may be due to the high gettering capability for metallic contamination during the device fabrication process and the suppression effects of oxygen diffusion into the device active layer. In addition, the defects with low internal oxygen concentration were observed in the C3H6-ion-implanted region of the double epitaxial silicon wafer after the device fabrication process. We found that the formation of defects with low internal oxygen concentration is a phenomenon specific to the C3H6-ion-implanted double epitaxial wafer. This finding suggests that the oxygen concentration in the defects being low is a factor in the high gettering capability for metallic impurities, and those defects are considered to directly contribute to the reduction in white spot defects in CMOS image sensor pixels.

Competitive assessment of 200-mm epitaxial silicon wafer flatness

1998 ◽  
Author(s):  
Howard R. Huff ◽  
D. W. McCormack, Jr.
Keyword(s):  
Silicon Wafer ◽  
Epitaxial Silicon

Enhanced Internal Gettering of Iron in n/n+ Epitaxial Silicon Wafer: Effect of High Temperature Rapid Thermal Annealing in Nitrogen Ambient

2015 ◽  
Vol 242 ◽  
pp. 218-223
Author(s):  
Peng Dong ◽  
Xing Bo Liang ◽  
Da Xi Tian ◽  
Xiang Yang Ma ◽  
De Ren Yang
Keyword(s):  
Silicon Wafer ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Silicon Wafers ◽  
Enhancement Effect ◽  
Epitaxial Silicon ◽  
High Concentration ◽  
Oxygen Precipitation ◽  
Doped Silicon ◽  
The One

We report a strategy feasible for improving the internal gettering (IG) capability of iron (Fe) for n/n+ epitaxial silicon wafers using the heavily arsenic (As)-doped Czochralski (CZ) silicon wafers as the substrates. The n/n+ epitaxial silicon wafers were subjected to the two-step anneal of 650 °C/16 h + 1000 °C/16 h following the rapid thermal processing (RTP) at 1250 °C in argon (Ar) or nitrogen (N2) atmosphere. It is found that the prior RTP in N2 atmosphere exhibits much stronger enhancement effect on oxygen precipitation (OP) in the substrates than that in Ar atmosphere, thereby leading to a better IG capability of Fe contamination on the epitaxial wafer. In comparison with the RTP in Ar atmosphere, the one in N2 atmosphere injects not only vacancies but also nitrogen atoms of high concentration into the heavily As-doped silicon substrate. The co-action of vacancy and nitrogen leads to the enhanced OP in the substrate and therefore the better IG capability for the n/n+ epitaxial silicon wafer.

Correlation of 150-mm silicon wafer site flatness with stepper performance for deep submicron applications

1992 ◽  
Author(s):  
Howard R. Huff ◽  
Joseph C. Vigil ◽  
Birol Kuyel ◽  
David Y. Chan ◽  
Long P. Nguyen
Keyword(s):  
Silicon Wafer ◽  
Deep Submicron

Hydrophobic Silicon-Direct Bonding for Fabrication of RF Microwave Devices

Manufacturing ◽  
2003 ◽  
Author(s):  
Iqbal K. Bansal
Keyword(s):  
Silicon Wafer ◽  
Failure Modes ◽  
Elevated Temperatures ◽  
Silicon Wafers ◽  
Electrical Performance ◽  
High Resistivity ◽  
Wafer Surface ◽  
Scanning System ◽  
Epitaxial Silicon ◽  
Thermal Bonding

Direct wafer bonding (DWB) is an operation of ultra-fine alignment, joining and thermal bonding of two silicon wafers. The first silicon wafer “handle” substrate is a Czochralski (<CZ>) substrate with N+ arsenic dopant with very low bulk resistivity, whereas second wafer “device” is a float-zone (<FZ>) having extremely high resistivity N-phosphorus dopant. Prior to the joining step, silicon wafers are chemically cleaned in order to minimize surface contamination. The wafer surface is “hydrophobic” which is achieved using an insitu oxide etching process. The surface quality is also characterized in terms of sub-micron light point defects (LPD’s) counts and haze concentration using a laser beam scanning system. After chemical clean, none of the LPD’s counts is greater than 1.0 μ size. The joining step is performed in a Class 100 or better environment by employing a commercial joiner. Then, thermal bonding operation is carried out by employing an extended stream oxidation cycle at elevated temperatures. Typical failure modes of DWB are misalignment errors and “voided” or “disbonded” regions. The area of “voided” regions for each bonded pair is determined by employing a scanning acoustic microscope. Detailed product throughtput and yield data are presented in this paper. A spreading resistivity profile (SRP) system is employed for accurate measurement of doping carrier concentration as a function of the depth. The superior uniformity for capacitance-voltage characteristics of a Si-Si bonded wafer versus an inverse epitaxial silicon wafer substrate is shown in terms of the device performance. The applications of silicon-direct wafer bonded substrates provide a quantum jump in the device electrical performance of PIN diodes.

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