Effect of Annealing Conditions on a Hafnium Oxide Reinforced SiO[sub 2] Gate Dielectric Deposited by Plasma-Enhanced Metallorganic CVD

2002 ◽  
Vol 149 (3) ◽  
pp. F18 ◽  
Author(s):  
Kyu-Jeong Choi ◽  
Woong-Chul Shin ◽  
Soon-Gil Yoon
Keyword(s):  
Hafnium Oxide ◽  
Gate Dielectric ◽  
Annealing Conditions

Scalability of MOCVD-deposited Hafnium Oxide

2003 ◽  
Vol 765 ◽  
Author(s):  
S. Van Elshocht ◽  
R. Carter ◽  
M. Caymax ◽  
M. Claes ◽  
T. Conard ◽  
...  
Keyword(s):  
Hafnium Oxide ◽  
Interfacial Layer ◽  
Gate Dielectric ◽  
Deposition Process ◽  
Oxide Thickness ◽  
Process Conditions ◽  
Primary Concern ◽  
Gate Electrode ◽  
K Value ◽  
High K

AbstractBecause of aggressive downscaling to increase transistor performance, the physical thickness of the SiO2 gate dielectric is rapidly approaching the limit where it will only consist of a few atomic layers. As a consequence, this will result in very high leakage currents due to direct tunneling. To allow further scaling, materials with a k-value higher than SiO2 (“high-k materials”) are explored, such that the thickness of the dielectric can be increased without degrading performance.Based on our experimental results, we discuss the potential of MOCVD-deposited HfO2 to scale to (sub)-1-nm EOTs (Equivalent Oxide Thickness). A primary concern is the interfacial layer that is formed between the Si and the HfO2, during the MOCVD deposition process, for both H-passivated and SiO2-like starting surfaces. This interfacial layer will, because of its lower k-value, significantly contribute to the EOT and reduce the benefit of the high-k material. In addition, we have experienced serious issues integrating HfO2 with a polySi gate electrode at the top interface depending on the process conditions of polySi deposition and activation anneal used. Furthermore, we have determined, based on a thickness series, the k-value for HfO2 deposited at various temperatures and found that the k-value of the HfO2 depends upon the gate electrode deposited on top (polySi or TiN).Based on our observations, the combination of MOCVD HfO2 with a polySi gate electrode will not be able to scale below the 1-nm EOT marker. The use of a metal gate however, does show promise to scale down to very low EOT values.

Investigation and optimization of HfO2 gate dielectric on N-polar GaN: Impact of surface treatments, deposition, and annealing conditions

2021 ◽  
Vol 119 (4) ◽  
pp. 042901
Author(s):  
Subhajit Mohanty ◽  
Islam Sayed ◽  
Zhe (Ashley) Jian ◽  
Umesh Mishra ◽  
Elaheh Ahmadi
Keyword(s):  
Gate Dielectric ◽  
Surface Treatments ◽  
Annealing Conditions

Electrical characteristics of highly reliable ultrathin hafnium oxide gate dielectric

2000 ◽  
Vol 21 (4) ◽  
pp. 181-183 ◽  
Author(s):  
Laegu Kang ◽  
Byoung Hun Lee ◽  
Wen-Jie Qi ◽  
Yongjoo Jeon ◽  
R. Nieh ◽  
...  
Keyword(s):  
Hafnium Oxide ◽  
Gate Dielectric ◽  
Electrical Characteristics

Hafnium oxide gate dielectric for strained-Si1−xGex

2003 ◽  
Vol 47 (11) ◽  
pp. 1995-2000 ◽  
Author(s):  
C.K. Maiti ◽  
S. Maikap ◽  
S. Chatterjee ◽  
S.K. Nandi ◽  
S.K. Samanta
Keyword(s):  
Hafnium Oxide ◽  
Gate Dielectric
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