Control of 4H-SiC (0001) Thermal Oxidation Process for Reduction of Interface State Density

2014 ◽  
Vol 64 (8) ◽  
pp. 23-28 ◽  
Author(s):  
K. Kita ◽  
R. H. Kikuchi ◽  
H. Hirai ◽  
Y. Fujino
Keyword(s):  
Thermal Oxidation ◽  
Oxidation Process ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Thermal Oxidation Process

High Channel Mobility in P-Channel MOSFETs Fabricated on 4H-SiC (0001) and Non-Basal Faces

2009 ◽  
Vol 615-617 ◽  
pp. 789-792
Author(s):  
Masato Noborio ◽  
Jun Suda ◽  
Tsunenobu Kimoto
Keyword(s):  
Thermal Oxidation ◽  
Interface State ◽  
Original Method ◽  
State Density ◽  
Interface State Density ◽  
Gate Oxides ◽  
Channel Mobility ◽  
Mos Devices

P-channel MOSFETs have been fabricated on 4H-SiC (0001) face as well as on 4H-SiC (03-38) and (11-20) faces. The gate oxides were formed by thermal oxidation in dry N2O ambient, which is widely accepted to improve the performance of n-channel SiC MOSFETs. The p-channel SiC MOSFETs with N2O-grown oxides on 4H-SiC (0001), (03-38), and (11-20) faces show a channel mobility of 7 cm2/Vs, 11 cm2/Vs, and 17 cm2/Vs, respectively. From the quasi-static C-V curves measured by using gate-controlled diodes, the interface state density was calculated by an original method. The interface state density was the lowest at the SiO2/4H-SiC (03-38) interface (about 1x1012 cm-2eV-1 at EV + 0.2 eV). The authors have applied deposited oxides to the 4H-SiC p-channel MOSFETs. The (0001), (03-38), and (11-20) MOSFETs with deposited oxides exhibit a channel mobility of 10 cm2/Vs, 13 cm2/Vs, and 17 cm2/Vs, respectively. The deposited oxides are one of effective approaches to improve both n-channel and p-channel 4H-SiC MOS devices.

Characteristics of Thin Layers of SiO2 Fabricated by Rapid Thermal Oxidation

1987 ◽  
Vol 92 ◽  
Author(s):  
S. Prasad ◽  
J. Haase ◽  
R. Früchtnicht ◽  
R. Ferretti ◽  
D. Haack
Keyword(s):  
Growth Rate ◽  
Thermal Oxidation ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Thin Layers ◽  
Rapid Thermal Oxidation ◽  
High Temperature Anneal ◽  
Work Function Difference ◽  
Function Difference

ABSTRACTThin layers of SiO2 (60-300 Å) were fabricated by rapid thermal oxidation (RTO). Growth rate on (100) and (111) Si was determined. Two different high-temperature anneal cycles were used to reduce the interface state density. Work function difference between metal and semiconductor depends upon technology and can be attributed to the changes in Si-SiO2 barrier height.

NF3 Added Oxidation of 4H-SiC(0001) and Suppression of Interface Degradation

2014 ◽  
Vol 778-780 ◽  
pp. 619-622 ◽  
Author(s):  
Ryu Hasunuma ◽  
Masahito Nagoshi ◽  
Kikuo Yamabe
Keyword(s):  
Electrical Properties ◽  
Oxidation Process ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Interface Properties ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Leakage Characteristics ◽  
Proper Balance

The electrical properties of SiO2/4H-SiC(0001) was characterized, and it was confirmed that the NF3 added oxidation in O2 can achieve interface with low interface state density. Optimization of NF3 added oxidation process was attempted to obtain films with both good interface properties and low leakage current. It was concluded that optimization of oxidation process should take account of obtaining proper balance among the rate of oxidation, which generates impurity carbon, the ability of carbon removal, and the rate of SiO2 etching which also affects the leakage characteristics.

Interface-State-Density Evaluation of p-type and n-type Ge/GeNx Structures by Conductance Technique

2013 ◽  
Vol 133 (7) ◽  
pp. 1279-1284
Author(s):  
Takuro Iwasaki ◽  
Toshiro Ono ◽  
Yohei Otani ◽  
Yukio Fukuda ◽  
Hiroshi Okamoto
Keyword(s):  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Conductance Technique ◽  
Density Evaluation ◽  
P Type
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