Si/SiGe Tunneling Static Random Access Memories

2013 ◽  
Vol 50 (9) ◽  
pp. 987-990 ◽  
Author(s):  
G. Ternent ◽  
D. J. Paul
Keyword(s):  
Random Access ◽  
Static Random Access Memories

scholarly journals III–V-on-Si Photonic Crystal Nanocavity Laser Technology for Optical Static Random Access Memories

2016 ◽  
Vol 22 (6) ◽  
pp. 295-304 ◽  
Author(s):  
Theonitsa Alexoudi ◽  
Dimitrios Fitsios ◽  
Alexandre Bazin ◽  
Paul Monnier ◽  
Rama Raj ◽  
...  
Keyword(s):  
Photonic Crystal ◽  
Random Access ◽  
Laser Technology ◽  
Static Random Access Memories

Low-Power Dynamic Memory Word Line Decoding for Static Random Access Memories

2008 ◽  
Vol 43 (11) ◽  
pp. 2524-2532 ◽  
Author(s):  
Giby Samson ◽  
Nagaraj Ananthapadmanabhan ◽  
Sayeed A. Badrudduza ◽  
Lawrence T. Clark
Keyword(s):  
Low Power ◽  
Random Access ◽  
Dynamic Memory ◽  
Power Dynamic ◽  
Static Random Access Memories ◽  
Memory Word

Prompt and Total Dose Response of Hard 4k and 16k CMOS Static Random Access Memories (SRAMs)

1984 ◽  
Vol 31 (6) ◽  
pp. 1354-1357 ◽  
Author(s):  
A. A. Witteles ◽  
H. Volmerange ◽  
H. Davidson ◽  
H. Yue ◽  
R. Jennings ◽  
...  
Keyword(s):  
Total Dose ◽  
Dose Response ◽  
Random Access ◽  
Static Random Access Memories

scholarly journals A Comparative Study of 6T and 8T SRAM Cell With Improved Read and Write Margins in 130 nm CMOS Technology

2020 ◽  
Vol 19 ◽  
Keyword(s):  
Comparative Analysis ◽  
Random Access ◽  
Cmos Technology ◽  
Noise Margin ◽  
Sram Cell ◽  
Static Random Access Memories ◽  
Node Voltage ◽  
Improve Stability ◽  
Static Noise ◽  
Better Than

This paper examines the factors that affect the Static Noise Margin (SNM) of a Static Random Access memories which focus on optimizing Read and Write operation of 8T SRAM cell which is better than 6T SRAM cell Using Swing Restoration for Dual Node Voltage. The read and Write time and improve Stability. New 8T SRAM technique on the circuit or architecture level is required. In this paper Comparative Analysis of 6T and 8T SRAM Cells with Improved Read and Write Margin is done for 130 nm Technology with Cadence Virtuoso schematics Tool.

scholarly journals Identification of Yield Limiting Defects in a 0.5 Micron, Shallow Trench Isolation Technology

1999 ◽  
Author(s):  
Christopher L. Henderson ◽  
Charles E. Hembree ◽  
Jerry M. Soden ◽  
Thomas J. Headley ◽  
Bruce L. Draper
Keyword(s):  
Power Supply ◽  
Random Access ◽  
Shallow Trench Isolation ◽  
Root Cause ◽  
Trench Isolation ◽  
Static Random Access Memories ◽  
Cause Of Failure ◽  
Radiation Hardened ◽  
Supply Current ◽  
Electrical Analysis

Abstract During the development and qualification of a radiation-hardened, 0.5 μm shallow trench isolation technology, several yield-limiting defects were observed. The 256K (32K x 8) static-random access memories (SRAMs) used as a technology characterization vehicle had elevated power supply current during wafer probe testing. Many of the die sites were functional, but exhibited quiescent power supply current (IDDQ) in excess of 100 μA, the present limit for this particular SRAM. Initial electrical analysis indicated that many of the die sites exhibited unstable IDDQ that fluctuated rapidly. We refer to this condition as “jitter.” The IDDQ jitter appeared to be independent of temperature and predominately associated with the larger 256K SRAMs and not as prevalent in the 16K SRAMs (on the same reticle set). The root cause of failure was found to be two major processing problems: salicide bridging and stress-induced dislocations in the silicon island

scholarly journals X-SRAM: Enabling In-Memory Boolean Computations in CMOS Static Random Access Memories

2018 ◽  
Vol 65 (12) ◽  
pp. 4219-4232 ◽  
Author(s):  
Amogh Agrawal ◽  
Akhilesh Jaiswal ◽  
Chankyu Lee ◽  
Kaushik Roy
Keyword(s):  
Random Access ◽  
Static Random Access Memories
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