Simulation-based test algorithm generation and port scheduling for multi-port memories

2001 ◽  
Author(s):  
Chi-Feng Wu ◽  
Chih-Tsun Huang ◽  
Kuo-Liang Cheng ◽  
Chih-Wea Wang ◽  
Cheng-Wen Wu
Keyword(s):  
Simulation Based ◽  
Test Algorithm ◽  
Algorithm Generation

Defect injection, Fault Modeling and Test Algorithm Generation Methodology for STT-MRAM

2018 ◽  
Author(s):  
S. M. Nair ◽  
R. Bishnoi ◽  
M. B. Tahoori ◽  
G. Tshagharyan ◽  
H. Grigoryan ◽  
...  
Keyword(s):  
Fault Modeling ◽  
Defect Injection ◽  
Test Algorithm ◽  
Algorithm Generation

Fault simulation and test algorithm generation for random access memories

2002 ◽  
Vol 21 (4) ◽  
pp. 480-490 ◽  
Author(s):  
Chi-Feng Wu ◽  
Chih-Tsun Huang ◽  
Kuo-Liang Cheng ◽  
Cheng-Wen Wu
Keyword(s):  
Fault Simulation ◽  
Random Access ◽  
Test Algorithm ◽  
Algorithm Generation
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