Reuse Distance-based Victim Cache for Effective Utilisation of Hybrid Main Memory System

2020 ◽  
Vol 25 (3) ◽  
pp. 1-32 ◽  
Author(s):  
Arijit Nath ◽  
Sukarn Agarwal ◽  
Hemangee K. Kapoor
Keyword(s):  
Memory System ◽  
Main Memory ◽  
Reuse Distance

scholarly journals Q-Selector-Based Prefetching Method for DRAM/NVM Hybrid Main Memory System

Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2158
Author(s):  
Jeong-Geun Kim ◽  
Shin-Dug Kim ◽  
Su-Kyung Yoon
Keyword(s):  
Performance Status ◽  
Random Access ◽  
Memory Systems ◽  
Memory System ◽  
Main Memory ◽  
Learning Method ◽  
Q Learning ◽  
Data Intensive ◽  
Big Data Applications ◽  
Non Volatile Memory

This research is to design a Q-selector-based prefetching method for a dynamic random-access memory (DRAM)/ Phase-change memory (PCM)hybrid main memory system for memory-intensive big data applications generating irregular memory accessing streams. Specifically, the proposed method fully exploits the advantages of two-level hybrid memory systems, constructed as DRAM devices and non-volatile memory (NVM) devices. The Q-selector-based prefetching method is based on the Q-learning method, one of the reinforcement learning algorithms, which determines a near-optimal prefetcher for an application’s current running phase. For this, our model analyzes real-time performance status to set the criteria for the Q-learning method. We evaluate the Q-selector-based prefetching method with workloads from data mining and data-intensive benchmark applications, PARSEC-3.0 and graphBIG. Our evaluation results show that the system achieves approximately 31% performance improvement and increases the hit ratio of the DRAM-cache layer by 46% on average compared to a PCM-only main memory system. In addition, it achieves better performance results compared to the state-of-the-art prefetcher, access map pattern matching (AMPM) prefetcher, by 14.3% reduction of execution time and 12.89% of better CPI enhancement.

scholarly journals An Energy-Efficient and Fast Scheme for Hybrid Storage Class Memory in an AIoT Terminal System

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 1013
Author(s):  
Hao Sun ◽  
Lan Chen ◽  
Xiaoran Hao ◽  
Chenji Liu ◽  
Mao Ni
Keyword(s):  
Energy Consumption ◽  
Data Storage ◽  
File System ◽  
Random Access ◽  
Memory System ◽  
Main Memory ◽  
Fast Mode ◽  
Hybrid Storage ◽  
Storage Class Memory ◽  
The Impact

Conventional main memory can no longer meet the requirements of low energy consumption and massive data storage in an artificial intelligence Internet of Things (AIoT) system. Moreover, the efficiency is decreased due to the swapping of data between the main memory and storage. This paper presents a hybrid storage class memory system to reduce the energy consumption and optimize IO performance. Phase change memory (PCM) brings the advantages of low static power and a large capacity to a hybrid memory system. In order to avoid the impact of poor write performance in PCM, a migration scheme implemented in the memory controller is proposed. By counting the write times and row buffer miss times in PCM simultaneously, the write-intensive data can be selected and migrated from PCM to dynamic random-access memory (DRAM) efficiently, which improves the performance of hybrid storage class memory. In addition, a fast mode with a tmpfs-based, in-memory file system is applied to hybrid storage class memory to reduce the number of data movements between memory and external storage. Experimental results show that the proposed system can reduce energy consumption by 46.2% on average compared with the traditional DRAM-only system. The fast mode increases the IO performance of the system by more than 30 times compared with the common ext3 file system.

Scalable high performance main memory system using phase-change memory technology

2009 ◽  
Vol 37 (3) ◽  
pp. 24-33 ◽  
Author(s):  
Moinuddin K. Qureshi ◽  
Vijayalakshmi Srinivasan ◽  
Jude A. Rivers
Keyword(s):  
Phase Change ◽  
High Performance ◽  
Phase Change Memory ◽  
Memory System ◽  
Main Memory ◽  
Change Memory

Access pattern-based high-performance main memory system for graph processing on single machines

2020 ◽  
Vol 108 ◽  
pp. 560-573
Author(s):  
Ji-Tae Yun ◽  
Su-Kyung Yoon ◽  
Jeong-Geun Kim ◽  
Shin-Dug Kim
Keyword(s):  
High Performance ◽  
Memory System ◽  
Main Memory ◽  
Graph Processing ◽  
Access Pattern
Sign in / Sign up

Export Citation Format

Share Document