A comprehensive approach to logic synthesis and physical design for two-dimensional logic arrays

1994 ◽  
Author(s):  
Andisheh Sarabi ◽  
Ning Song ◽  
Malgorzata Chrzanowska-Jeske ◽  
Marek A. Perkowski
Keyword(s):  
Logic Synthesis ◽  
Physical Design ◽  
Comprehensive Approach ◽  
Two Dimensional

scholarly journals Combining Technology Mapping With Layout

VLSI Design ◽  
1997 ◽  
Vol 5 (2) ◽  
pp. 111-124 ◽  
Author(s):  
Massoud Pedram ◽  
Narasimha Bhat ◽  
Ernest S. Kuh
Keyword(s):  
Significant Contribution ◽  
Logic Synthesis ◽  
Integrated Approach ◽  
Physical Design ◽  
Technology Mapping ◽  
Design Representation ◽  
Interconnect Optimization ◽  
Improved Performance ◽  
Logic Structure

Due to the significant contribution of interconnect to the area and speed of today's circuits and the technological trend toward smaller and faster gates which will make the effects of interconnect even more substantial, interconnect optimization must be performed during all phases of the design. The premise of this paper is that by increasing the interaction between logic synthesis and physical design, circuits with smaller area and interconnection length, and improved performance and routability can be obtained compared to when the two processes are done separately. In particular, this paper describes an integrated approach to technology mapping and physical design which finds solutions in both domains of design representation simultaneously and interactively. The two processes are performed in lockstep: technology mapping takes advantage of detailed information about the interconnect delays and the layout cost of various optimization alternatives; placement itself is guided by the evolving logic structure and accurate path-based delay traces. Using these techniques, circuits with smaller area and higher performance have been synthesized.

scholarly journals Timing Challenges for Very Deep Sub-Micron (VDSM) IC

VLSI Design ◽  
2002 ◽  
Vol 15 (3) ◽  
pp. 557-562 ◽  
Author(s):  
Ichiang Lin ◽  
Chien-In Henry Chen
Keyword(s):  
Market Share ◽  
High Performance ◽  
Logic Synthesis ◽  
Physical Design ◽  
Timing Verification ◽  
Ic Design ◽  
Cell Library ◽  
Timing Closure ◽  
Interconnect Delay ◽  
Critical Paths

Many IC design houses failed to be market leaders because they miss the market window due to timing closure problems. Compared to half-micron designs, the amount of time spent on timing verification has greatly increased. Cell delays can be accurately estimated during logic synthesis. However, interconnect delays are unknown until the wire geometry is defined in physical design. Logic synthesis using the cell library models for interconnect delay estimates may be statistically accurate, but can not predict the delay of individual nets accurately. Delay estimates for individual nets (global nets, long wires, large fan-outs, buses), which matter most for the critical paths can be inaccurate and cause a design failure. Inaccurate timing verification causes silicon failure in shipped products that results in the loss of millions of dollars spent designing a high-performance product and potentially larger costs due to lost market share. Full-chip, sign-off verification with silicon-accuracy will allow these problems to be discovered and fixed before tape-out.

Spectrophotometric measurements of objective-prism spectra

1966 ◽  
Vol 24 ◽  
pp. 118-119
Author(s):  
Th. Schmidt-Kaler
Keyword(s):  
Progress Report ◽  
Two Dimensional ◽  
Objective Prism ◽  
Made In

I should like to give you a very condensed progress report on some spectrophotometric measurements of objective-prism spectra made in collaboration with H. Leicher at Bonn. The procedure used is almost completely automatic. The measurements are made with the help of a semi-automatic fully digitized registering microphotometer constructed by Hög-Hamburg. The reductions are carried out with the aid of a number of interconnected programmes written for the computer IBM 7090, beginning with the output of the photometer in the form of punched cards and ending with the printing-out of the final two-dimensional classifications.

Introductory paper

1966 ◽  
Vol 24 ◽  
pp. 3-5
Author(s):  
W. W. Morgan
Keyword(s):  
Line Intensity ◽  
Classification Scheme ◽  
Two Dimensional ◽  
Spectral Classification ◽  
Dimensional Array ◽  
Rr Lyrae ◽  
Metallic Line ◽  
Introductory Paper ◽  
Parameter Varying ◽  
Definition Of

1. The definition of “normal” stars in spectral classification changes with time; at the time of the publication of theYerkes Spectral Atlasthe term “normal” was applied to stars whose spectra could be fitted smoothly into a two-dimensional array. Thus, at that time, weak-lined spectra (RR Lyrae and HD 140283) would have been considered peculiar. At the present time we would tend to classify such spectra as “normal”—in a more complicated classification scheme which would have a parameter varying with metallic-line intensity within a specific spectral subdivision.

A one-dimensional self-gravitating stellar gas

1966 ◽  
Vol 25 ◽  
pp. 46-48 ◽  
Author(s):  
M. Lecar
Keyword(s):  
Gravitational Field ◽  
Phase Space ◽  
Motion Picture ◽  
Space Distribution ◽  
Two Dimensional ◽  
One Dimensional ◽  
Phase Space Distribution ◽  
Dimensional Phase Space ◽  
The Mean

“Dynamical mixing”, i.e. relaxation of a stellar phase space distribution through interaction with the mean gravitational field, is numerically investigated for a one-dimensional self-gravitating stellar gas. Qualitative results are presented in the form of a motion picture of the flow of phase points (representing homogeneous slabs of stars) in two-dimensional phase space.

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