Behavioral synthesis of highly testable data paths under the non-scan and partial scan environments

Proceedings of the 30th international on Design automation conference - DAC '93 ◽

10.1145/157485.164897 ◽

1993 ◽

Cited By ~ 57

Author(s):

Tien-Chien Lee ◽

Niraj K. Jha ◽

Wayne H. Wolf

Keyword(s):

Partial Scan ◽

Behavioral Synthesis

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Behavioral synthesis of low-cost partial scan designs for DSP applications

Proceedings of ICASSP '94. IEEE International Conference on Acoustics, Speech and Signal Processing ◽

10.1109/icassp.1994.389615 ◽

2002 ◽

Cited By ~ 2

Author(s):

S. Dey ◽

M. Potkonjak ◽

R.K. Roy

Keyword(s):

Low Cost ◽

Partial Scan ◽

Behavioral Synthesis ◽

Dsp Applications

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Behavioral synthesis of area-efficient testable designs using interaction between hardware sharing and partial scan

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.406715 ◽

1995 ◽

Vol 14 (9) ◽

pp. 1141-1154 ◽

Cited By ~ 28

Author(s):

M. Potkonjak ◽

S. Dey ◽

R.K. Roy

Keyword(s):

Partial Scan ◽

Behavioral Synthesis ◽

Hardware Sharing ◽

Area Efficient

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Part-in-whole point cloud registration for aircraft partial scan automated localization

Computer-Aided Design ◽

10.1016/j.cad.2021.103042 ◽

2021 ◽

Vol 137 ◽

pp. 103042

Author(s):

Qian Xie ◽

Yiming Zhang ◽

Xuanming Cao ◽

Yabin Xu ◽

Dening Lu ◽

...

Keyword(s):

Point Cloud ◽

Point Cloud Registration ◽

Partial Scan

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Selecting Partial Scan Flip-flops For Circuit Partitioning

IEEE/ACM International Conference on Computer-Aided Design ◽

10.1109/iccad.1994.629890 ◽

2005 ◽

Cited By ~ 1

Author(s):

T. Ono

Keyword(s):

Circuit Partitioning ◽

Partial Scan

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Theorems for identifying undetectable faults in partial-scan circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2003.814957 ◽

2003 ◽

Vol 22 (8) ◽

pp. 1092-1097 ◽

Cited By ~ 2

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Partial Scan ◽

Scan Circuits

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Behavioral synthesis methodology for HDL-based specification and validation

Proceedings of the 32nd ACM/IEEE conference on Design automation conference - DAC '95 ◽

10.1145/217474.217543 ◽

1995 ◽

Cited By ~ 16

Author(s):

D. Knapp ◽

T. Ly ◽

D. MacMillen ◽

R. Miller

Keyword(s):

Behavioral Synthesis ◽

Synthesis Methodology

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Equivalence checking for function pipelining in behavioral synthesis

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2014 ◽

10.7873/date.2014.163 ◽

2014 ◽

Cited By ~ 2

Author(s):

Kecheng Hao ◽

Sandip Ray ◽

Fei Xie

Keyword(s):

Equivalence Checking ◽

Behavioral Synthesis

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VHDL Modeling for Behavioral Synthesis

Behavioral Synthesis and Component Reuse with VHDL ◽

10.1007/978-1-4615-6315-0_3 ◽

1997 ◽

pp. 67-124

Author(s):

Ahmed A. Jerraya ◽

Hong Ding ◽

Polen Kission ◽

Maher Rahmouni

Keyword(s):

Behavioral Synthesis

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Photoacoustic and Thermoacoustic Tomography: Consistency Conditions and the Partial Scan Problem

Photoacoustic Imaging and Spectroscopy ◽

10.1201/9781420059922-12 ◽

2017 ◽

pp. 103-114

Author(s):

Sarah K. Patch

Keyword(s):

Thermoacoustic Tomography ◽

Partial Scan ◽

Consistency Conditions

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Resolution of dynamic memory allocation and pointers for the behavioral synthesis from C

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840289 ◽

2002 ◽

Cited By ~ 6

Author(s):

L. Semeria ◽

K. Sato ◽

G. De Micheli

Keyword(s):

Memory Allocation ◽

Dynamic Memory ◽

Behavioral Synthesis ◽

Dynamic Memory Allocation

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