Device performance-based OPC for optimal circuit performance and mask cost reduction

2008 ◽  
Author(s):  
Siew-Hong Teh ◽  
Chun-Huat Heng ◽  
Arthur Tay
Keyword(s):  
Cost Reduction ◽  
Device Performance ◽  
Circuit Performance

Applications of MeV Ion Implantation in Semiconductor Device Manufacturing

1994 ◽  
Vol 354 ◽  
Author(s):  
John O. Borland
Keyword(s):  
Ion Implantation ◽  
Flash Memory ◽  
Mass Production ◽  
Cost Reduction ◽  
Semiconductor Device ◽  
Design Rule ◽  
Great Promise ◽  
Manufacturing Cost ◽  
Device Performance ◽  
The World

AbstractUse of MeV ion implantation for mass production of CMOS devices at 0.5um design rule and beyond is now being accepted around the world for 16Mb DRAM, 16Mb Flash memory and CMOS logic/microprocessor technologies. Incorporating MeV well formation for twin well and triple well results in a reduction of up to 3 masking layers corresponding to process simplification and manufacturing cost reduction of 10% to 16%. For CMOS logic application, a new structure called BILLI (Buriedjmplanted Layer for Lateral Isolation) is showing great promise for latch-up free CMOS and when combined with hydrogen denuded bulk Czochraliski (CZ) grown silicon wafers, has the potential to replace epitaxial wafers with improved device performance. This paper will review MeV ion implantation use for these various CMOS applications.

Flexible Single-Crystalline GaN Substrate by Direct Deposition of III-N Thin Films on Polycrystalline Metal Tape

2021 ◽  
Author(s):  
Shahab Shervin ◽  
Mina Moradnia ◽  
Md Kamrul Alam ◽  
Tian Tong ◽  
Mi-Hee Ji ◽  
...  
Keyword(s):  
Performance Improvement ◽  
Flexible Electronics ◽  
Cost Reduction ◽  
Semiconductor Materials ◽  
Manufacturing Cost ◽  
Device Performance ◽  
Polycrystalline Metal ◽  
Group Iii ◽  
Device Stability ◽  
Metal Tape

Flexible electronics and mechanically bendable devices based on Group III-N semiconductor materials are emerging, while there are several challenges in manufacturing-cost reduction, device stability and flexibility, and device-performance improvement. To...

Particle characterization of CVD tungsten metallization for 64 MBIT DRAM

1991 ◽  
Vol 49 ◽  
pp. 896-897
Author(s):  
Marylyn Bennett-Lilley ◽  
Thomas T.H. Fu ◽  
David D. Yin ◽  
R. Allen Bowling
Keyword(s):  
Chemical Vapor ◽  
Device Performance ◽  
Particle Characterization ◽  
Particle Generation ◽  
Tungsten Hexafluoride ◽  
Homogeneous Particle ◽  
Multiple Levels ◽  
Circuit Density ◽  
Sources Of Contamination

Chemical Vapor Deposition (CVD) tungsten metallization is used to increase VLSI device performance due to its low resistivity, and improved reliability over other metallization schemes. Because of its conformal nature as a blanket film, CVD-W has been adapted to multiple levels of metal which increases circuit density. It has been used to fabricate 16 MBIT DRAM technology in a manufacturing environment, and is the metallization for 64 MBIT DRAM technology currently under development. In this work, we investigate some sources of contamination. One possible source of contamination is impurities in the feed tungsten hexafluoride (WF6) gas. Another is particle generation from the various reactor components. Another generation source is homogeneous particle generation of particles from the WF6 gas itself. The purpose of this work is to investigate and analyze CVD-W process-generated particles, and establish a particle characterization methodology.

In situ TEM measurements of the electrical properties of interface dislocations

1992 ◽  
Vol 50 (2) ◽  
pp. 1338-1339
Author(s):  
F. M. Ross ◽  
R. Hull ◽  
D. Bahnck ◽  
J. C. Bean ◽  
L. J. Peticolas ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Electronic Device ◽  
In Situ Tem ◽  
Device Performance ◽  
Misfit Dislocations ◽  
Electrical Characteristics ◽  
Strained Layer ◽  
Transmission Electron ◽  
Interfacial Dislocations

We describe an investigation of the electrical properties of interfacial dislocations in strained layer heterostructures. We have been measuring both the structural and electrical characteristics of strained layer p-n junction diodes simultaneously in a transmission electron microscope, enabling us to correlate changes in the electrical characteristics of a device with the formation of dislocations.The presence of dislocations within an electronic device is known to degrade the device performance. This degradation is of increasing significance in the design and processing of novel strained layer devices which may require layer thicknesses above the critical thickness (hc), where it is energetically favourable for the layers to relax by the formation of misfit dislocations at the strained interfaces. In order to quantify how device performance is affected when relaxation occurs we have therefore been investigating the electrical properties of dislocations at the p-n junction in Si/GeSi diodes.

Charging microscopy and cathodoluminescence imaging of semi-insulating gallium arsenide

1986 ◽  
Vol 44 ◽  
pp. 816-817
Author(s):  
T.C. Sheu ◽  
S. Myhajlenko ◽  
D. Davito ◽  
J.L. Edwards ◽  
R. Roedel ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Secondary Electron ◽  
Crystal Defects ◽  
Device Performance ◽  
Gaas Wafer ◽  
Surface Charging ◽  
Gaas Substrates ◽  
Voltage Contrast ◽  
Cathodoluminescence Imaging ◽  
Scanning Electron

Liquid encapsulated Czochralski (LEC) semi-insulating (SI) GaAs has applications in integrated optics and integrated circuits. Yield and device performance is dependent on the homogeniety of the wafers. Therefore, it is important to characterise the uniformity of the GaAs substrates. In this respect, cathodoluminescence (CL) has been used to detect the presence of crystal defects and growth striations. However, when SI GaAs is examined in a scanning electron microscope (SEM), there will be a tendency for the surface to charge up. The surface charging affects the backscattered and secondary electron (SE) yield. Local variations in the surface charge will give rise to contrast (effectively voltage contrast) in the SE image. This may be associated with non-uniformities in the spatial distribution of resistivity. Wakefield et al have made use of “charging microscopy” to reveal resistivity variations across a SI GaAs wafer. In this work we report on CL imaging, the conditions used to obtain “charged” SE images and some aspects of the contrast behaviour.

Development of liquid crystal light valves using Bi12SiO20 as the photoconductor. Part 2: Device performance

1986 ◽  
Vol 133 (1) ◽  
pp. 65
Author(s):  
W.L. Baillie ◽  
P.M. Openshaw ◽  
A.D. Hart ◽  
S.S. Makh
Keyword(s):  
Liquid Crystal ◽  
Device Performance

Implementasi Analisis Proses Bisnis Sebagai Upaya Pengurangan Biaya

2019 ◽  
Vol 10 (1) ◽  
pp. 1-27
Author(s):  
Aniek Wijayanti
Keyword(s):  
Business Process ◽  
Cost Reduction ◽  
Process Analysis ◽  
Value Added ◽  
Added Value ◽  
Natural Material ◽  
Management Activity ◽  
Procurement Process ◽  
Material Procurement ◽  
The Cost

Business Process Analysis can be used to eliminate or reduce a waste cost caused by non value added activities that exist in a process. This research aims at evaluating activities carried out in the natural material procurement process in the PT XYZ, calculating the effectiveness of the process cycle, finding a way to improve the process management, and calculating the cost reduction that can achieved by activity management. A case study was the approach of this research. The researcher obtained research data throughout deep interviews with the staff who directly involved in the process, observation, and documentation of natural material procurement. The result of this study show that the effectiveness of the process cycle of natural material procurement in the factory reached as much as 87,1% for the sand material and 72% for the crushed stone. This indicates that the process still carry activities with no added value and still contain ineffective costs. Through the Business Process Mechanism, these non value added activities can be managed so that the process cycle becomes more efficient and cost effectiveness is achieved. The result of the effective cycle calculation after the management activities implementation is 100%. This means that the cost of natural material procurement process has become effective. The result of calculation of the estimated cost reduction as a result of management activity is as much as Rp249.026.635,90 per year.

Air Bridge Technology: A Comparison of Novel Interconnect Materials and Integration Schemes for Beyond 45 nm

2003 ◽  
Vol 766 ◽  
Author(s):  
Kenneth Foster ◽  
Joost Waeterloos ◽  
Don Frye ◽  
Steve Froelicher ◽  
Mike Mills
Keyword(s):  
Dielectric Constants ◽  
Advanced Technology ◽  
Effective Dielectric Constant ◽  
Device Performance ◽  
Interlayer Dielectric ◽  
Integration Schemes ◽  
Stepwise Reduction ◽  
Bridge Technology ◽  
Integrated Device ◽  
Compare And Contrast

AbstractThe electronics industry, in a continual drive for improved integrated device performance, is seeking increasingly lower dielectric constants (k) of the insulators that are used as interlayer dielectric (ILD) for advanced logic interconnects. As the industry continually seeks a stepwise reduction of the “effective” dielectric constant (keff), simple extendibility, leads to the consideration of the highest performance possible, namely air bridge technology. In this paper we will discuss requirements, integration schemes and properties for a novel class of materials that has been developed as part of an advanced technology probe into air bridge architecture. We will compare and contrast these potential technology offerings with other existing dense and porous ILD integration options, and show that the choice is neither trivial nor obvious.

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