Low-temperature polysilicon technology for active matrix addressing of LCDs and OLEDs

Author(s):  
Didier Pribat ◽  
Francois Plais
2001 ◽  
Vol 685 ◽  
Author(s):  
Ching-Wei Lin ◽  
Li-Jing Cheng ◽  
Yin-Lung Lu ◽  
Huang-Chung Cheng

AbstractA simple process sequence for fabrication of low temperature polysilicon (LTPS) TFTs with self-aligned graded LDD structure was demonstrated. The graded LDD structure was self-aligned by side-etch of Al under the photo-resist followed by excimer laser irradiation for dopant activation and laterally diffusion. The graded LDD polysilicon TFTs were suitable for high-speed operation and active matrix switches applications because they possessed low-leakage-current characteristic without sacrificing driving capability significantly and increasing overlap capacitance. The leakage current of graded LDD polysilicon TFTs at Vd = 5V and Vg = −10V could attain to below 1pA/μm without any hygrogenation process, when proper LDD length and laser activation process were applied. The on/off current ratios of these devices were also above 108. Furthermore, due to graded dopant distribution in LDD regions, the drain electric field could be reduced further, and as a result, graded LDD polysilicon TFTs provided high reliability for high voltage operation.


2006 ◽  
Vol 37 (1) ◽  
pp. 254 ◽  
Author(s):  
J. H. Park ◽  
W. J. Nam ◽  
J. H. Lee ◽  
M. K. Han ◽  
K. Y. Lee ◽  
...  

1994 ◽  
Vol 345 ◽  
Author(s):  
Tatsuo Morita ◽  
Shuhei Tsuchimoto ◽  
Nobuo Hashizume

AbstractThe amorphous silicon thin transistor (a-Si TIFT) has successfully industrialized the active matrix liquid crystal displays (AMLCDs), which would get a vast market on the basis of their wide potential use for displays. Whereas, the polysilicon TFT (p-Si TFT) also has been intensely investigated and intended to realize smarter AMLCDs, with monolithic peripheral circuits.In this paper, we will discuss the applicable range of low temperature p-Si TFTs compared with high temperature p-Si TFTs. After reviewing the materials which comprise low temperature p-Si TFTs, we will introduce our self aligned aluminum gate process which could allow fast addressing even in enlarged AMLCDs in the future.


2007 ◽  
Vol 38 (1) ◽  
pp. 1684-1685 ◽  
Author(s):  
Tae Hyung Hwang ◽  
Woojae Lee ◽  
Wang Su Hong ◽  
Sung Jin Kim ◽  
Sang Il Kim ◽  
...  

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