Detecting solder balls in full-field ball grid array images using a coarse-to-fine process

2018 ◽  
Author(s):  
Chenyuan Wang ◽  
Fengzhi Fu ◽  
Yanlei Li ◽  
Hua Fan
Keyword(s):  
Ball Grid Array ◽  
Full Field ◽  
Solder Balls ◽  
Coarse To Fine

A 10 MHz to 80 GHz BGA Transition from Chip to LTCC Interposer for Chip Scale Packages

2015 ◽  
Vol 2015 (CICMT) ◽  
pp. 000067-000072
Author(s):  
Bradley A. Thrasher ◽  
William E. McKinzie ◽  
Deepukumar M. Nair ◽  
Michael A. Smith ◽  
Allan Beikmohamadi ◽  
...  
Keyword(s):  
Insertion Loss ◽  
Flip Chip ◽  
Ball Grid Array ◽  
Electrical Performance ◽  
60 Ghz ◽  
Test Chip ◽  
Full Wave ◽  
Test Board ◽  
Measurement Results ◽  
Solder Balls

Presented here are the design, fabrication, and measurement results of a low temperature cofired ceramic (LTCC) chip-to-interposer transition utilizing a flip-chip ball grid array (BGA) interconnect that provides excellent electrical performance up to and including 80 GHz. A test board fabricated in LTCC is used as the interposer substrate and another smaller LTCC part is used as a surrogate chip for demonstration purposes. The BGA chip-to-interposer transition is designed as a back-to-back pair of transitions with an assembly consisting of an LTCC interposer, an LTCC test chip, and a BGA interconnect constructed with 260 μm diameter polymer core solder balls. The LTCC material employed is DuPont™ GreenTape™ 9K7. Full-wave simulation results predict excellent electrical performance from 10 MHz to 80 GHz, with the chip-to-interposer BGA transition having less than 0.5 dB insertion loss at 60 GHz and less than 1 dB insertion loss up to 80 GHz. In an assembled package (back-to-back BGA transitions), the insertion loss was measured to be 1 dB per transition at 60 GHz and less than 2 dB per transition for all frequencies up to 80 GHz.

Impact of Reprocessing Technique on First Level Interconnects of Pb-Free to SnPb Reballed Area Array Flip Chip Devices

2014 ◽  
Vol 2014 (1) ◽  
pp. 000112-000116
Author(s):  
Joelle Arnold ◽  
Steph Gulbrandsen ◽  
Nathan Blattau
Keyword(s):  
Computer Tomography ◽  
Damage Accumulation ◽  
Flip Chip ◽  
Ball Grid Array ◽  
Acoustic Microscopy ◽  
Eutectic Solder ◽  
X Ray ◽  
Area Array ◽  
Solder Balls ◽  
Commercial Off The Shelf

The risk of damage caused by reballing SnPb eutectic solder balls onto a commercial off-the-shelf (COTS) active flip chip with a ball grid array (BGA) of SAC305 was studied. The effects of reballing performed by five different reballers were examined and compared. The active flip chip device selected included manufacturer specified resistance between eight (8) differential port pairs. The path resistance between these pins following reballing, as compared to an unreballed device, was used to assess damage accumulation in the package. 2-dimensional x-ray microscopy, acoustic microscopy, and x-ray computer tomography were also used to characterize the effects of reballing. These studies indicated that no measureable damage was incurred by the reballing process, implying that reballed devices should function as well as non-reballed devices in the same application.

Robust Design Optimization of Ball Grid Array Packaging

2011 ◽  
Author(s):  
Jae Chang Kim ◽  
Joo-Ho Choi ◽  
Yeong K. Kim
Keyword(s):  
Design Optimization ◽  
Robust Design ◽  
Strain Energy ◽  
Reduction Method ◽  
Ball Grid Array ◽  
Robust Design Optimization ◽  
Molding Compound ◽  
Materials Modeling ◽  
Solder Balls ◽  
Input Variables

In this paper, comparisons of the design optimization of ball grid array packaging geometry based on the elastic and viscoelastic material properties are made. Six geometric dimensions of the packaging are chosen as input variables. Molding compound and substrate are modeled as elastic and viscoelastic, respectively. Viscoplastic finite element analyses are performed to calculate the strain energy densities (SED) of the eutectic solder balls. Robust design optimizations to minimize SED are carried out, which accounts for the variance of the parameters via Kriging dimension reduction method. Optimum solutions are compared with those by the Taguchi method. It is found that the effects of the packaging geometry on the solder ball reliability are significant, and the optimization results are different depending on the materials modeling.

Electrical resistance of Sn–Ag–Cu ball grid array packages with Sn–Zn–Bi addition jointed at 240 °C

2007 ◽  
Vol 22 (1) ◽  
pp. 113-123
Author(s):  
Po-Cheng Shih ◽  
Kwang-Lung Lin
Keyword(s):  
Control System ◽  
Intermetallic Compound ◽  
Aging Time ◽  
Electrical Resistance ◽  
Ball Grid Array ◽  
Solder Paste ◽  
Solder Balls ◽  
Solder Bulk ◽  
Ball Grid Array Packages

Sn–8Zn–3Bi solder paste and Sn–3.2Ag–0.5Cu solder balls were reflowed simultaneously at 240 °C on Cu/Ni/Au metallized ball grid array substrates. The joints without Sn–Zn–Bi addition (only Sn–Ag–Cu) were studied as a control system. Electrical resistance was measured after multiple reflows and aging. The electrical resistance of the joint (R1) consisted of three parts: the solder bulk (Rsolder bulk, upper solder highly beyond the mask), interfacial solder/intermetallic compound (Rsolder/IMC), and the substrate (Rsubstrate). R1 increased with reflows and aging time. Rsolder/IMC, rather than Rsolder bulk and Rsubstrate, seemed to increase with reflows and aging time. The increase of R1 was ascribed to the Rsolder/IMC rises. Rsubstrate was the major contribution to R1. However Rsolder/IMC dominated the increase of R1 with reflows and aging. R1 of Sn–Zn–Bi/Sn–Ag–Cu samples were higher than that of Sn–Ag–Cu samples in various tests.

Effects of Corner/Edge Bonding and Underfill Properties on the Thermal Cycling Performance of Lead Free Ball Grid Array Assemblies

2012 ◽  
Vol 134 (1) ◽  
Author(s):  
P. Borgesen ◽  
D. Blass ◽  
M. Meilunas
Keyword(s):  
Thermal Cycling ◽  
Flip Chip ◽  
Printed Circuit Board ◽  
Ball Grid Array ◽  
Cycling Performance ◽  
Circuit Board ◽  
Lead Free ◽  
Sac305 Solder ◽  
Solder Balls ◽  
Selection Of

Underfilling will almost certainly improve the performance of an area array assembly in drop, vibration, etc. However, depending on the selection of materials, the thermal fatigue life may easily end up worse than without an underfill. This is even more true for lead free than for eutectic SnPb soldered assemblies. If reworkability is required, the bonding of the corners or a larger part of the component edges to the printed circuit board (PCB), without making contact with the solder joints, may offer a more attractive materials selection. A 30 mm flip chip ball grid array (FCBGA) component with SAC305 solder balls was attached to a PCB and tested in thermal cycling with underfills and corner/edge bonding reinforcements. Two corner bond materials and six reworkable and nonreworkable underfills with a variety of mechanical properties were considered. All of the present underfills reduced the thermal cycling performance, while edge bonding improved it by up to 50%. One set of the FCBGAs was assembled with a SnPb paste and underfilled with a soft reworkable underfill. Surprisingly, this improved the thermal cycling performance slightly beyond that of the nonunderfilled assemblies, providing up to three times better life than for those assembled with a SAC305 paste.

Effect of Lid Materials on the Solder Ball Reliability of Thermally Enhanced Flip-Chip Plastic Ball Grid Array Packages

2006 ◽  
Vol 306-308 ◽  
pp. 1043-1048
Author(s):  
Yi-Ming Jen ◽  
Hsi Hsin Chien ◽  
Tsung-Shu Lin ◽  
Shih Hsiang Huang
Keyword(s):  
Fatigue Life ◽  
Thermal Fatigue ◽  
Solder Ball ◽  
Flip Chip ◽  
Ball Grid Array ◽  
Stress Strain ◽  
Thermal Fatigue Life ◽  
Plastic Ball ◽  
Plastic Ball Grid Array ◽  
Solder Balls

This research studied the thermal fatigue life for eutectic solder balls of thermally enhanced flip-chip plastic ball grid array (FC-PBGA) packages with different lid materials under thermal cycling tests. Three FC-PBGA packages with different lid materials, i.e., Al, AlSiC, and Cu, were utilized to examine the lid material effect on solder ball reliability. The cyclic stress/strain behavior for the packages was estimated by using the nonlinear finite element method. The eutectic solder was assumed to be elastic-plastic-creep. The stable stress/strain results obtained from FEM analysis were utilized to predict the thermal fatigue life of solder balls by using the Coffin-Manson prediction model. Simulation results showed that the fatigue life of the FC-PBGA package with a Cu lid was much shorter than FC-PBGA packages with other lid materials. The relatively shorter fatigue life for the FC-PBGA package with a Cu lid was due to the complex constrained behavior caused by the thermal mismatch between the lid, substrate and the printed circuit board. The difference was insignificant in the fatigue lives between the package with an Al lid and the conventional package.

Thermal analysis and optimization for a ball grid array package

2005 ◽  
Vol 219 (4) ◽  
pp. 381-393 ◽  
Author(s):  
C-I Ho ◽  
T-C Hung ◽  
C-I Hung
Keyword(s):  
Thermal Resistance ◽  
Heat Dissipation ◽  
Ball Grid Array ◽  
Optimization Method ◽  
Heat Transfer Analysis ◽  
Bga Packages ◽  
Solder Balls ◽  
Bga Package ◽  
Computational Fluid Dynamics Cfd ◽  
Artificial Neural Network Ann

In this study, a computational fluid dynamics (CFD) approach is employed for heat transfer analysis of a ball grid array (BGA) package that is widely used in the modern electronics industry. Owing to the complicated geometric configuration of the BGA package, the submodel approach is used to investigate in detail the temperature distributions of thermal vias and solder balls. The effective thermal resistance of a BGA package has been successfully obtained from numerical simulations. An artificial neural network (ANN) is trained to establish the relationship between the geometry input and the thermal resistance output. The well-trained network is then coupled with the complex optimization method to search for the optimum design of the BGA package to achieve the lowest thermal resistance. The results of this study provide the electronic packaging industry with a reliable and rapid method for heat dissipation design of BGA packages.

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