A 10 MHz to 80 GHz BGA Transition from Chip to LTCC Interposer for Chip Scale Packages

2015 ◽  
Vol 2015 (CICMT) ◽  
pp. 000067-000072
Author(s):  
Bradley A. Thrasher ◽  
William E. McKinzie ◽  
Deepukumar M. Nair ◽  
Michael A. Smith ◽  
Allan Beikmohamadi ◽  
...  
Keyword(s):  
Insertion Loss ◽  
Flip Chip ◽  
Ball Grid Array ◽  
Electrical Performance ◽  
60 Ghz ◽  
Test Chip ◽  
Full Wave ◽  
Test Board ◽  
Measurement Results ◽  
Solder Balls

Presented here are the design, fabrication, and measurement results of a low temperature cofired ceramic (LTCC) chip-to-interposer transition utilizing a flip-chip ball grid array (BGA) interconnect that provides excellent electrical performance up to and including 80 GHz. A test board fabricated in LTCC is used as the interposer substrate and another smaller LTCC part is used as a surrogate chip for demonstration purposes. The BGA chip-to-interposer transition is designed as a back-to-back pair of transitions with an assembly consisting of an LTCC interposer, an LTCC test chip, and a BGA interconnect constructed with 260 μm diameter polymer core solder balls. The LTCC material employed is DuPont™ GreenTape™ 9K7. Full-wave simulation results predict excellent electrical performance from 10 MHz to 80 GHz, with the chip-to-interposer BGA transition having less than 0.5 dB insertion loss at 60 GHz and less than 1 dB insertion loss up to 80 GHz. In an assembled package (back-to-back BGA transitions), the insertion loss was measured to be 1 dB per transition at 60 GHz and less than 2 dB per transition for all frequencies up to 80 GHz.

Impact of Reprocessing Technique on First Level Interconnects of Pb-Free to SnPb Reballed Area Array Flip Chip Devices

2014 ◽  
Vol 2014 (1) ◽  
pp. 000112-000116
Author(s):  
Joelle Arnold ◽  
Steph Gulbrandsen ◽  
Nathan Blattau
Keyword(s):  
Computer Tomography ◽  
Damage Accumulation ◽  
Flip Chip ◽  
Ball Grid Array ◽  
Acoustic Microscopy ◽  
Eutectic Solder ◽  
X Ray ◽  
Area Array ◽  
Solder Balls ◽  
Commercial Off The Shelf

The risk of damage caused by reballing SnPb eutectic solder balls onto a commercial off-the-shelf (COTS) active flip chip with a ball grid array (BGA) of SAC305 was studied. The effects of reballing performed by five different reballers were examined and compared. The active flip chip device selected included manufacturer specified resistance between eight (8) differential port pairs. The path resistance between these pins following reballing, as compared to an unreballed device, was used to assess damage accumulation in the package. 2-dimensional x-ray microscopy, acoustic microscopy, and x-ray computer tomography were also used to characterize the effects of reballing. These studies indicated that no measureable damage was incurred by the reballing process, implying that reballed devices should function as well as non-reballed devices in the same application.

scholarly journals Wideband Waveguide-to-Microstrip Transition for mm-Wave Applications

2019 ◽  
Vol 22 (5) ◽  
pp. 17-32
Author(s):  
Andrey V. Mozharovskiy ◽  
Oleg V. Soykin ◽  
Aleksey A. Artemenko ◽  
Roman O. Maslennikov ◽  
Irina B. Vendik
Keyword(s):  
Experimental Investigation ◽  
Millimeter Wave ◽  
Insertion Loss ◽  
Communication Systems ◽  
60 Ghz ◽  
Feeding System ◽  
Frequency Range ◽  
Low Loss ◽  
Passive Components ◽  
Full Wave

Introduction. Increased data rate in modern communication systems can be achieved by raising the operational frequency to millimeter wave range where wide transmission bands are available. In millimeter wave communication systems, the passive components of the antenna feeding system, which are based on hollow metal waveguides, and active elements of the radiofrequency circuit, which have an interface constructed on planar printed circuit boards (PCB) are interconnected using waveguide-to-microstrip transition.Aim. To design and investigate a high-performance wideband and low loss waveguide-to-microstrip transition dedicated to the 60 GHz frequency range applications that can provide effective transmission of signals between the active components of the radiofrequency circuit and the passive components of the antenna feeding systemMaterials and methods. Full-wave electromagnetic simulations in the CST Microwave Studio software were used to estimate the impact of the substrate material and metal foil on the characteristics of printed structures and to calculate the waveguide-to-microstrip transition characteristics. The results were confirmed via experimental investigation of fabricated wideband transition samples using a vector network analyzer Results. The probe-type transition consist of a PCB fixed between a standard WR-15 waveguide and a back-short with a simple structure and the same cross-section. The proposed transition also includes two through-holes on the PCB in the center of the transition area on either side of the probe. A significant part of the lossy PCB dielectric is removed from that area, thus providing wideband and low-loss performance of the transition without any additional matching elements. The design of the transition was adapted for implementation on the PCBs made of two popular dielectric materials RO4350B and RT/Duroid 5880. The results of full-wave simulation and experimental investigation of the designed waveguide to microstrip transition are presented. The transmission bandwidth for reflection coefficient S11 < –10 dB is in excess of 50…70 GHz. The measured insertion loss for a single transition is 0.4 and 0.7 dB relatively for transitions based on RO4350B and RT/Duroid 5880.Conclusion. The proposed method of insertion loss reduction in the waveguide-to-microstrip transition provides effective operation due to reduction of the dielectric substrate portion in the transition region for various high-frequency PCB materials. The designed waveguide-to -microstrip transition can be considered as an effective solution for interconnection between the waveguide and microstrip elements of the various millimeter-wave devices dedicated for the 60 GHz frequency range applications.

GHz High Frequency TSV for 2.5D IC Packaging

2012 ◽  
Vol 2012 (1) ◽  
pp. 001215-001220
Author(s):  
Chi-Han Chen ◽  
Kuan-Chung Lu ◽  
Chang-Ying Hung ◽  
Pao-Nan Lee ◽  
Meng-Jen Wang ◽  
...  
Keyword(s):  
Insertion Loss ◽  
High Frequency ◽  
Flip Chip ◽  
Signal Propagation ◽  
Point Of View ◽  
Electrical Performance ◽  
Signal Loss ◽  
Electrical Interconnection ◽  
Bottom Side ◽  
Ic Package

TSV (Through Silicon Via) is the key enabling technology for 2.5D & 3D IC stacking solution in FCBGA (Flip Chip Ball Grid Array). As the 2.5D interposer design pushing toward smaller & shorter via due to high I/O density and high frequency requirement, the electrical performance of thinner interposer is therefore much more challenging in low signal loss performance for high frequency application and process. From the structure point of view, the silicon interposer is an additive layer between top side chip(s) and bottom side substrate, it is therefore an additional electrical interconnection which affects the signal propagation between chip(s) and substrate. Therefore, the performance of the TSV insertion loss in silicon interposer becomes critical, especially for above GHz application. Real measurement is conducted to validate the electrical performance of TSV interconnection up to 67GHz, and the wideband scalable model of TSV is also proposed and compared with the measured data. The measurement of this TSV structure has demonstrated the advantages with low parasitic capacitance and low insertion loss at high frequency. Full validated reliability test is also presented to verify interposer fabrication, assembly process optimization, and interconnection stability of the 2.5D IC package.

Effects of Corner/Edge Bonding and Underfill Properties on the Thermal Cycling Performance of Lead Free Ball Grid Array Assemblies

2012 ◽  
Vol 134 (1) ◽  
Author(s):  
P. Borgesen ◽  
D. Blass ◽  
M. Meilunas
Keyword(s):  
Thermal Cycling ◽  
Flip Chip ◽  
Printed Circuit Board ◽  
Ball Grid Array ◽  
Cycling Performance ◽  
Circuit Board ◽  
Lead Free ◽  
Sac305 Solder ◽  
Solder Balls ◽  
Selection Of

Underfilling will almost certainly improve the performance of an area array assembly in drop, vibration, etc. However, depending on the selection of materials, the thermal fatigue life may easily end up worse than without an underfill. This is even more true for lead free than for eutectic SnPb soldered assemblies. If reworkability is required, the bonding of the corners or a larger part of the component edges to the printed circuit board (PCB), without making contact with the solder joints, may offer a more attractive materials selection. A 30 mm flip chip ball grid array (FCBGA) component with SAC305 solder balls was attached to a PCB and tested in thermal cycling with underfills and corner/edge bonding reinforcements. Two corner bond materials and six reworkable and nonreworkable underfills with a variety of mechanical properties were considered. All of the present underfills reduced the thermal cycling performance, while edge bonding improved it by up to 50%. One set of the FCBGAs was assembled with a SnPb paste and underfilled with a soft reworkable underfill. Surprisingly, this improved the thermal cycling performance slightly beyond that of the nonunderfilled assemblies, providing up to three times better life than for those assembled with a SAC305 paste.

Comparison Between Multilayer Ceramic and Organic Package Substrates Based Upon Signal and Power Integrity

2011 ◽  
Vol 2011 (1) ◽  
pp. 000905-000913
Author(s):  
Jerry Aguirre ◽  
Paul Garland ◽  
Marcos Vargas ◽  
Heather Tallo ◽  
Joseph Tallo
Keyword(s):  
Power Distribution ◽  
Flip Chip ◽  
Organic Substrate ◽  
Electrical Performance ◽  
Power Integrity ◽  
Power Distribution Network ◽  
Wave Simulation ◽  
Full Wave ◽  
Differential Pair ◽  
Multilayer Ceramic

Comparisons between organic and ceramic packaging is a difficult task given the considerable number of differences in material properties and potential tradeoffs between cost, electrical performance, thermal performance, and environmental factors. This paper presents a power and signal integrity comparison between a select set of multilayer organic technologies (HDBU and CPCore) and multilayer ceramic technologies (HTCC and LTCC). The geometry and material property impact on electrical performance for the flip-chip first level interconnect are qualitatively discussed and compared. The broadband frequency performance for the ball grid array (BGA) second-level interconnect to a PWB is simulated and characterized to 40 GHz for a differential pair using full-wave simulation. The impedance of the power distribution network (PDN) for a ceramic package is characterized by measurement to correlate with full-wave simulation to then subsequently compare with an organic substrate PDN.

Effect of Lid Materials on the Solder Ball Reliability of Thermally Enhanced Flip-Chip Plastic Ball Grid Array Packages

2006 ◽  
Vol 306-308 ◽  
pp. 1043-1048
Author(s):  
Yi-Ming Jen ◽  
Hsi Hsin Chien ◽  
Tsung-Shu Lin ◽  
Shih Hsiang Huang
Keyword(s):  
Fatigue Life ◽  
Thermal Fatigue ◽  
Solder Ball ◽  
Flip Chip ◽  
Ball Grid Array ◽  
Stress Strain ◽  
Thermal Fatigue Life ◽  
Plastic Ball ◽  
Plastic Ball Grid Array ◽  
Solder Balls

This research studied the thermal fatigue life for eutectic solder balls of thermally enhanced flip-chip plastic ball grid array (FC-PBGA) packages with different lid materials under thermal cycling tests. Three FC-PBGA packages with different lid materials, i.e., Al, AlSiC, and Cu, were utilized to examine the lid material effect on solder ball reliability. The cyclic stress/strain behavior for the packages was estimated by using the nonlinear finite element method. The eutectic solder was assumed to be elastic-plastic-creep. The stable stress/strain results obtained from FEM analysis were utilized to predict the thermal fatigue life of solder balls by using the Coffin-Manson prediction model. Simulation results showed that the fatigue life of the FC-PBGA package with a Cu lid was much shorter than FC-PBGA packages with other lid materials. The relatively shorter fatigue life for the FC-PBGA package with a Cu lid was due to the complex constrained behavior caused by the thermal mismatch between the lid, substrate and the printed circuit board. The difference was insignificant in the fatigue lives between the package with an Al lid and the conventional package.

The Study of Underfill Epoxy Hardness in Reducing Curing Process Time for Flip Chip Packaging

2011 ◽  
Vol 462-463 ◽  
pp. 1194-1199
Author(s):  
Zainudin Kornain ◽  
Azman Jalar ◽  
Rozaidi Rashid ◽  
Shahrum Abdullah
Keyword(s):  
Thermal Expansion ◽  
Flip Chip ◽  
Ball Grid Array ◽  
Process Time ◽  
Curing Process ◽  
Curing Time ◽  
Hold Temperature ◽  
Flip Chip Packaging ◽  
Time Cycle ◽  
The Impact

Underfilling is the vital process to reduce the impact of the thermal stress that results from the mismatch in the co-efficient of thermal expansion (CTE) between the silicon chip and the substrate in Flip Chip Packaging. This paper reported the pattern of underfill’s hardness during curing process for large die Ceramic Flip Chip Ball Grid Array (FC-CBGA). A commercial amine based underfill epoxy was dispensed into HiCTE FC-CBGA and cured in curing oven under a new method of two-step curing profile. Nano-identation test was employed to investigate the hardness of underfill epoxy during curing steps. The result has shown the almost similar hardness of fillet area and centre of the package after cured which presented uniformity of curing states. The total curing time/cycle in production was potentially reduced due to no significant different of hardness after 60 min and 120 min during the period of second hold temperature.

Computer-Aided Analysis and Measurement of an Interconnection System

2011 ◽  
Vol 308-310 ◽  
pp. 2279-2285
Author(s):  
Wei Chen Lee ◽  
Hill Wu
Keyword(s):  
Simulation Model ◽  
Frequency Domain ◽  
Insertion Loss ◽  
Return Loss ◽  
Design Phase ◽  
Electrical Characteristics ◽  
Impedance Mismatch ◽  
Measurement Results ◽  
Computer Aided Analysis ◽  
Computer Aided

The electrical characteristics of an interconnection system, which include impedance, insertion loss, and return loss, can greatly affect its performance as the signal speed increases. The objective of this research was to understand the discrepancy between the computer-aided analysis and measurement results of an interconnection system, so that a more accurate prediction of the electrical characteristics of this system can be made during the design phase. It was discovered that in both the time and frequency domain the computer-aided analysis results were consistent with the measurement results. Given these conclusions the simulation model was modified to improve the impedance mismatch within the interconnection system. It was found that by properly designing the antipad, the impedance mismatch can be greatly reduced.

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