Silicon photonics WDM interconnects based on resonant ring modulators and semiconductor mode locked laser

Author(s):  
J. Müller ◽  
J. Hauck ◽  
B. Shen ◽  
S. Romero-García ◽  
E. Islamova ◽  
...  
2015 ◽  
Vol 4 (2) ◽  
Author(s):  
Juliana Müller ◽  
Johannes Hauck ◽  
Bin Shen ◽  
Sebastian Romero-García ◽  
Elmira Islamova ◽  
...  

AbstractWe demonstrate a wavelength domain-multiplexed (WDM) optical link relying on a single section semiconductor mode-locked laser (SS-MLL) with quantum dash (Q-Dash) gain material to generate 25 optical carriers spaced by 60.8 GHz, as well as silicon photonics (SiP) resonant ring modulators (RRMs) to modulate individual optical channels. The link requires optical reamplification provided by an erbium-doped fiber amplifier (EDFA) in the system experiments reported here. Open eye diagrams with signal quality factors (Q-factors) above 7 are measured with a commercial receiver (Rx). For higher compactness and cost effectiveness, reamplification of the modulated channels with a semiconductor optical amplifier (SOA) operated in the linear regime is highly desirable. System and device characterization indicate compatibility with the latter. While we expect channel counts to be primarily limited by the saturation output power level of the SOA, we estimate a single SOA to support more than eight channels. Prior to describing the system experiments, component design and detailed characterization results are reported including design and characterization of RRMs, ring-based resonant optical add-drop multiplexers (RR-OADMs) and thermal tuners, S-parameters resulting from the interoperation of RRMs and RR-OADMs, and characterization of Q-Dash SS-MLLs reamplified with a commercial SOA. Particular emphasis is placed on peaking effects in the transfer functions of RRMs and RR-OADMs resulting from transient effects in the optical domain, as well as on the characterization of SS-MLLs in regard to relative intensity noise (RIN), stability of the modes of operation, and excess noise after reamplification.


2017 ◽  
Vol 7 (1) ◽  
Author(s):  
Alvaro Moscoso-Mártir ◽  
Juliana Müller ◽  
Johannes Hauck ◽  
Nicolas Chimot ◽  
Rony Setter ◽  
...  

2017 ◽  
Vol 7 (1) ◽  
Author(s):  
Alvaro Moscoso-Mártir ◽  
Juliana Müller ◽  
Elmira Islamova ◽  
Florian Merget ◽  
Jeremy Witzens

2018 ◽  
Vol 26 (19) ◽  
pp. 25446 ◽  
Author(s):  
Alvaro Moscoso-Mártir ◽  
Ali Tabatabaei-Mashayekh ◽  
Juliana Müller ◽  
Jovana Nojić ◽  
Rony Setter ◽  
...  

Author(s):  
Pradip Sairam Pichumani ◽  
Fauzia Khatkhatay

Abstract Silicon photonics is a disruptive technology that aims for monolithic integration of photonic devices onto the complementary metal-oxide-semiconductor (CMOS) technology platform to enable low-cost high-volume manufacturing. Since the technology is still in the research and development phase, failure analysis plays an important role in determining the root cause of failures seen in test vehicle silicon photonics modules. The fragile nature of the test vehicle modules warrants the development of new sample preparation methods to facilitate subsequent non-destructive and destructive analysis methods. This work provides an example of a single step sample preparation technique that will reduce the turnaround time while simultaneously increasing the scope of analysis techniques.


Author(s):  
Yin S Ng ◽  
William Lo ◽  
Kenneth Wilsher

Abstract We present an overview of Ruby, the latest generation of backside optical laser voltage probing (LVP) tools [1, 2]. Carrying over from the previous generation of IDS2700 systems, Ruby is capable of measuring waveforms up to 15GHz at low core voltages 0.500V and below. Several new optical capabilities are incorporated; these include a solid immersion lens (SIL) for improved imaging resolution [3] and a polarization difference probing (PDP) optical platform [4] for phase modulation detection. New developments involve Jitter Mitigation, a scheme that allows measurements of jittery signals from circuits that are internally driven by the IC’s onboard Phase Locked Loop (PLL). Additional timing features include a Hardware Phase-Locked Loop (HWPLL) scheme for improved locking of the LVP’s Mode-Locked Laser (MLL) to the tester clock as well as a clockless scheme to improve the LVP’s usefulness and user friendliness. This paper presents these new capabilities and compares these with those of the previous generation of LVP systems [5, 6].


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