Microspectrophotometric studies of optical waveguide in silicon wafer with buried oxide layer

1994 ◽  
Author(s):  
A. Y. Gasilov ◽  
Alexander N. Magunov ◽  
M. I. Makovijchuk ◽  
Evgenii O. Parshin
Keyword(s):  
Oxide Layer ◽  
Silicon Wafer ◽  
Optical Waveguide ◽  
Buried Oxide

TEM investigation on top Si layer and buried oxide layer in silicon wafer implanted with low dose at low energy

2004 ◽  
Vol 36 (8) ◽  
pp. 945-948 ◽  
Author(s):  
A. Jaroenworaluck ◽  
P. Sarmphim ◽  
S. Muensit ◽  
R. Stevens
Keyword(s):  
Oxide Layer ◽  
Silicon Wafer ◽  
Low Dose ◽  
Low Energy ◽  
Buried Oxide

Effect of Annealing on the Structure of Buried SiO2 Layers Formed By Elevated Temperature High Dose Oxygen Implantation

1985 ◽  
Vol 53 ◽  
Author(s):  
S.J. Krause ◽  
C.O. Jung ◽  
S.R. Wilson ◽  
R.P. Lorigan ◽  
M.E. Burnham
Keyword(s):  
Single Crystal ◽  
Oxide Layer ◽  
Elevated Temperatures ◽  
Superficial Layer ◽  
Silicon On Insulator ◽  
High Dose ◽  
Threading Dislocations ◽  
Heater Temperature ◽  
Buried Oxide ◽  
Structural Differences

ABSTRACTOxygen has been implanted into Si wafers at high doses and elevated temperatures to form a buried SiO2 layer for use in silicon-on-insulator (SOI) structures. Substrate heater temperatures have been varied (300, 400, 450 and 500°C) to determine the effect on the structure of the superficial Si layer through a processing cycle of implantation, annealing, and epitaxial growth. Transmission electron microscopy was used to characterize the structure of the superficial layer. The structure of the samples was examined after implantation, after annealing at 1150°C for 3 hours, and after growth of the epitaxial Si layer. There was a marked effect on the structure of the superficial Si layer due to varying substrate heater temperature during implantation. The single crystal structure of the superficial Si layer was preserved at all implantation temperatures from 300 to 500°C. At the highest heater temperature the superficial Si layer contained larger precipitates and fewer defects than did wafers implanted at lower temperatures. Annealing of the as-implanted wafers significantly reduced structural differences. All wafers had a region of large, amorphous 10 to 50 nm precipitates in the lower two-thirds of the superficial Si layer while in the upper third of the layer there were a few threading dislocations. In wafers implanted at lower temperatures the buried oxide grew at the top surface only. During epitaxial Si growth the buried oxide layer thinned and the precipitate region above and below the oxide layer thickened for all wafers. There were no significant structural differences of the epitaxial Si layer for wafers with different implantation temperatures. The epitaxial layer was high quality single crystal Si and contained a few threading dislocations. Overall, structural differences in the epitaxial Si layer due to differences in implantation temperature were minimal.

A new partial SOI-LDMOSFET with a modified buried oxide layer for improving self-heating and breakdown voltage

2011 ◽  
Vol 26 (9) ◽  
pp. 095005 ◽  
Author(s):  
S E Jamali Mahabadi ◽  
Ali A Orouji ◽  
P Keshavarzi ◽  
Hamid Amini Moghadam
Keyword(s):  
Oxide Layer ◽  
Breakdown Voltage ◽  
Self Heating ◽  
Buried Oxide

Investigation of polarization mechanisms on unibond buried oxide layer

2007 ◽  
Vol 84 (9-10) ◽  
pp. 2129-2132
Author(s):  
V. Tsouti ◽  
G. Papaioannou ◽  
J. Jomaah ◽  
F. Balestra
Keyword(s):  
Oxide Layer ◽  
Buried Oxide

Characterization of Porous Silicon Layers Containing A Buried Oxide Layer

2000 ◽  
pp. 195-204 ◽  
Author(s):  
S. I. Romanov ◽  
A. V. Dvurechenskii ◽  
Yu. I. Yakovlev ◽  
R. Grötzschel ◽  
U. Kreissig ◽  
...  
Keyword(s):  
Porous Silicon ◽  
Oxide Layer ◽  
Buried Oxide

Comparison of lateral IGBT and lateral emitter switched thyristor with a partial buried oxide layer

1997 ◽  
Vol T69 ◽  
pp. 341-344
Author(s):  
Chong-Man Yun ◽  
Jae-Hyung Kim ◽  
Min-Koo Han ◽  
Yearn-Ik Choi
Keyword(s):  
Oxide Layer ◽  
Buried Oxide

Effects of buried oxide layer on working speed of SiGe heterojunction photo-transistor

2020 ◽  
Vol 29 (2) ◽  
pp. 028501
Author(s):  
Xian-Cheng Liu ◽  
Jia-Jun Ma ◽  
Hong-Yun Xie ◽  
Pei Ma ◽  
Liang Chen ◽  
...  
Keyword(s):  
Oxide Layer ◽  
Buried Oxide

Deep and Shallow Electron Trapping in the Buried Oxide Layer of SIMOX Structures

1994 ◽  
Vol 141 (10) ◽  
pp. 2801-2804 ◽  
Author(s):  
V. V. Afanas'ev ◽  
A. G. Revesz ◽  
G. A. Brown ◽  
H. L. Hughes
Keyword(s):  
Oxide Layer ◽  
Electron Trapping ◽  
Buried Oxide
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