Page-sized amorphous silicon image sensor arrays

Author(s):  
Robert A. Street ◽  
Richard L. Weisfield ◽  
Steven E. Nelson ◽  
R. Chang
1996 ◽  
Vol 198-200 ◽  
pp. 1151-1154 ◽  
Author(s):  
R.A. Street ◽  
X.D. Wu ◽  
R. Weisfield ◽  
S. Ready ◽  
R. Apte ◽  
...  

1995 ◽  
Vol 377 ◽  
Author(s):  
R. A. Street ◽  
X. D. Wu ◽  
R. Weisfield ◽  
S. Ready ◽  
R. Apte ◽  
...  

ABSTRACTLarge two dimensional amorphous silicon image sensor arrays offer a new approach to electronic document input and x-ray imaging. The sensor array technology is now capable of image capture at greater than 10 frames/sec and with resolution of 200–400 spi. We describe our new high resolution imaging system, comprising a page-sized sensor array with nearly 3 million pixels, and the accompanying high speed read out and processing electronics. The key technological issues of pixel resolution, sensor fill factor, leakage currents and noise are reviewed. Measurements of a new array architecture are described, in which the sensor is formed as a single continuous film on top of the matrix addressing components.


Nano Letters ◽  
2011 ◽  
Vol 11 (6) ◽  
pp. 2214-2218 ◽  
Author(s):  
William S. Wong ◽  
Sourobh Raychaudhuri ◽  
René Lujan ◽  
Sanjiv Sambandan ◽  
Robert A. Street

1998 ◽  
Vol 227-230 ◽  
pp. 1306-1310 ◽  
Author(s):  
R.A Street ◽  
R.B Apte ◽  
T Granberg ◽  
P Mei ◽  
S.E Ready ◽  
...  

1992 ◽  
Vol 258 ◽  
Author(s):  
M J Powell ◽  
I D French ◽  
J R Hughes ◽  
N C Bird ◽  
O S Davies ◽  
...  

ABSTRACTWe have developed a technology for 2D matrix-addressed image sensors using amorphous silicon photodiodes and thin film transistors. We have built a small prototype, having 192×192 pixels with a 20μm pixel pitch, and assessed its performance. The nip photodiodes can have dark current densities of less than 1011 A.cm-2 (up to 5V reverse bias) and peak quantum efficiencies of 88% (at 580nm). We operated the sensor in real time mode at high speed (50 Hz frame rate and 64μS line time). The image sensor has a low noise performance giving a dynamic range in excess of 104. The maximum crosstalk is about 2%, which allows at least 50 grey levels. The bottom contact of the photodiode acts as a light shield from light through the substrate, which enables the sensor to be operated as an intimate contact image sensor to image a document placed directly on top of the array. In this mode, the CTF was 75% at 2 lp.mm1. Good quality images are demonstrated in both front projection and intimate contact imaging modes.


1997 ◽  
Vol 487 ◽  
Author(s):  
R. A. Street ◽  
R. B. Apte ◽  
S. E. Ready ◽  
R. L. Weisfield ◽  
P. Nylen

AbstractLarge area amorphous silicon image sensor arrays are important for x-ray medical imaging and document scanning as well as a variety of other applications where large sensor size is required. The paper first summarizes the present state of the flat panel x-ray imager technology, and compares the two main approaches for x-ray detection. We then describe the performance of a new, large area, high resolution, radiographic imager based on a single amorphous silicon array with 2304×3200 pixels, and an active area of 30×40 cm (12×1 6”).


Nano Today ◽  
2022 ◽  
Vol 42 ◽  
pp. 101366
Author(s):  
Wenchao Gao ◽  
Zhangsheng Xu ◽  
Xun Han ◽  
Caofeng Pan

2010 ◽  
Vol 2010 (1) ◽  
pp. 000015-000022
Author(s):  
Paul Enquist

3D microelectronics integration and wafer scale packaging promise improvements in functional density and cost compared to conventional 2D microelectronics and packaging technologies. The realization of these improvements will require further adoption of 3D volume manufacturing process technologies. These process technologies will likely include through silicon via (TSV) and die or wafer bonding with and without 3D interconnect. Low temperature direct bond technologies have a number of inherent performance and cost advantages compared to other bonding technologies. This paper describes low temperature direct oxide bond technologies with and without a scalable 3D interconnect developed by Ziptronix and cost savings, performance and applications that will be enabled by adoption of these technologies. Enabled cost savings and performance include system or network-on-chip, system in package, and TSVs. Enabled applications include backside illuminated image sensors, micron-scale pitch vertically integrated image sensor arrays, 3D system-on-chip and 3D network-on-chip.


2020 ◽  
Vol 7 (7) ◽  
pp. 1901-1911 ◽  
Author(s):  
Aobo Ren ◽  
Jihua Zou ◽  
Huagui Lai ◽  
Yixuan Huang ◽  
Liming Yuan ◽  
...  

Solution-processed MXene–perovskite image sensor arrays are realized by a top-down method, which combine desirable manufacturing advantages and state-of-the-art performance metrics.


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