Fabrication and photoluminescence investigation of silicon nanowires on silicon-on-insulator material

1998 ◽  
Vol 16 (2) ◽  
pp. 582 ◽  
Author(s):  
M. Gotza
Keyword(s):  
Silicon Nanowires ◽  
Silicon On Insulator

Nano-Imprint Patterning of Nanowire Structures for Interconnect Study

2005 ◽  
Author(s):  
Bin Li ◽  
Anastassios Mavrokefalos ◽  
Jianhua Zhou ◽  
Li Shi ◽  
Paul S. Ho ◽  
...  
Keyword(s):  
Electron Beam ◽  
Cross Section ◽  
Silicon Nanowires ◽  
Size Effects ◽  
Silicon On Insulator ◽  
Si Nanowires ◽  
Section Surface ◽  
Etching Mask ◽  
Interconnect Lines ◽  
Nano Imprint

A thermal nano-imprint method has been developed to pattern sub-40 nm polymer lines of Hydrogensilsesquioxane (HSQ) and electron beam resist ZEP 520A. The imprint template was the cross section surface of a selectively etched GaAs/AlGaAs heterostructure wafer. Silicon nanowires were formed using reactive ion etching (RIE) of a silicon-on-insulator wafer with the polymer nanolines as an etching mask. The obtained Si nanowires were well defined and continuous for a length up to hundreds of microns. Reaction of the silicon lines with a metal can lead to the formation of silicide interconnect lines, which is used to investigate the size effects on the transport and electromigration properties of interconnects for future microelectronics.

Formation of Single Tiers of Bridging Silicon Nanowires for Transistor Applications Using Vapor-Liquid-Solid Growth from Short Silicon-on-Insulator Sidewalls

Small ◽  
2009 ◽  
Vol 5 (21) ◽  
pp. 2440-2444 ◽  
Author(s):  
Osama M. Nayfeh ◽  
Dimitri A. Antoniadis ◽  
Steven Boles ◽  
Charles Ho ◽  
Carl V. Thompson
Keyword(s):  
Silicon Nanowires ◽  
Silicon On Insulator ◽  
Vapor Liquid Solid ◽  
Vapor Liquid Solid Growth ◽  
Vapor Liquid

Fabrication of SiNWs-FET Nanostructure Via Atomic Force Microscopy Lithography

2020 ◽  
Vol 301 ◽  
pp. 103-110
Author(s):  
Nurain Najihah Alias ◽  
Khatijah Aisha Yaacob ◽  
Kuan Yew Cheong
Keyword(s):  
Atomic Force Microscopy ◽  
Relative Humidity ◽  
Silicon Nanowires ◽  
Silicon Oxide ◽  
Silicon Layer ◽  
Silicon On Insulator ◽  
Force Microscopy ◽  
Atomic Force ◽  
Effect Transistor ◽  
P Type

The unique electrical properties of silicon nanowires (SiNWs) is one of the reasons it become an attractive transducer for biosensor nowadays. Positive (holes) and negative (electron) charge carriers from SiNWs can simply interact with either positive or negative charge of sensing target. In this paper, we have studied the fabrication of silicon nanowires field effect transistor (SiNWs-FET) nanostructure patterned on 15 Ω resistivity of p-type silicon on insulator (SOI) wafer fabricated via atomic force microscopy lithography technique. To fabricate SiNWs-FET nanostructure, a conductive AFM tip, Cr/Pt cantilever tip, was used then various value of applied voltage, writing speed and relative humidity were studied. Subsequent, followed by wet etching processes, admixture of tetramethylammonium hydroxide (TMAH) and isopropyl alcohol (IPA) were used to remove the undesired of silicon layer and diluted hydrofluoric acid (HF) was used to remove the oxide layer. From the results, it shows that, cantilever tip at 9 V with 0.4 μm/s writing speed and relative humidity between 55% - 60% gives the best formation of silicon oxide to fabricate SiNWs-FET nanostructure.

scholarly journals Enhanced self-phase modulation in silicon nanowires integrated with 2D graphene oxide films

2020 ◽  
Author(s):  
David Moss
Keyword(s):  
Graphene Oxide ◽  
Silicon Nanowires ◽  
Phase Modulation ◽  
Oxide Films ◽  
Silicon On Insulator ◽  
Two Dimensional ◽  
Self Phase Modulation

Two-dimensional layered graphene oxide (GO) films are integrated with silicon-on-insulator nanowires to experimentally demonstrate enhanced self-phase modulation, <a>achieving high broadening factor of up to 4.14 for a device patterned with 0.4-mm-long, 10 layers of GO. </a>

High Gain, Silicon-on-insulator Photodetector with Multiple Gates and a Nanowire Based Narrow-wide-narrow Channel

2011 ◽  
Vol 1305 ◽  
Author(s):  
Anita Fadavi Roudsari ◽  
Simarjeet S. Saini ◽  
Nixon O ◽  
M. P. Anantram
Keyword(s):  
Silicon Nanowires ◽  
Narrow Channel ◽  
High Gain ◽  
Silicon On Insulator ◽  
Photo Response ◽  
Charge Flow

ABSTRACTWe propose a phototransistor geometry that incorporates silicon nanowires (SiNW) in the device channel. A set of two gates controls the charge flow inside the NW. This improves the device photo-response more than 10x when compared with a single gate phototransistor, leading to a photo-responsivity of greater than 104(A/W), while the dark properties of both devices are similar.

A Simple Process for Lateral Single Crystal Silicon Nanowires

2002 ◽  
Author(s):  
Veljko Milanovic´ ◽  
Lance Doherty
Keyword(s):  
Single Crystal ◽  
Silicon Nanowires ◽  
Direct Contact ◽  
Single Crystal Silicon ◽  
Silicon On Insulator ◽  
Silicon Nanostructures ◽  
Device Layer ◽  
Crystal Silicon ◽  
Simple Process ◽  
20 Nm

In a single-mask standard photolithography based process and a single etch step, lateral silicon nanowires are fabricated according to arbitrary layout and over a range of diameters and lengths. Nanowires with diameters from ∼20 nm and with lengths ranging from 2 μm to 100 μm were fabricated in direct contact with two silicon probing pads for measurement. These nanowires are electrically isolated in the silicon-on-insulator wafer device layer, and suspended over the substrate, thereby increasing thermal and electrical isolation. Because they are formed from single crystal silicon, minimal defects are expected. The addition of a polysilicon deposition and patterning further enhances the process by allowing coaxial silicon nanostructures.

Sign in / Sign up

Export Citation Format

Share Document